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Searched refs:AR_PHY_RESTART_DIV_GC (Results 1 – 4 of 4) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416phy.h117 #define AR_PHY_RESTART_DIV_GC 0x001C0000 /* bb_ant_fast_div_gc_limit */ macro
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212phy.h248 #define AR_PHY_RESTART_DIV_GC 0x001C0000 /* bb_ant_fast_div_gc_limit */ macro
H A Dar5212_misc.c848 *result = MS(*result, AR_PHY_RESTART_DIV_GC); in ar5212GetCapability()
978 v &= ~AR_PHY_RESTART_DIV_GC; in ar5212SetCapability()
979 v |= SM(setting, AR_PHY_RESTART_DIV_GC); in ar5212SetCapability()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300phy.h507 #define AR_PHY_RESTART_DIV_GC 0x001C0000 /* bb_ant_fast_div_gc_limit */ macro