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Searched refs:AR_PHY_PLL_CTL (Results 1 – 7 of 7) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/
H A Dar5211phy.h44 #define AR_PHY_PLL_CTL 0x987c /* PLL control register */ macro
H A Dar5211_attach.c259 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44); in ar5211Attach()
H A Dar5211_reset.c607 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44); in ar5211ChipReset()
611 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_40); in ar5211ChipReset()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212phy.h139 #define AR_PHY_PLL_CTL 0x987c /* PLL control register */ macro
H A Dar5212_reset.c938 curPhyPLL = OS_REG_READ(ah, AR_PHY_PLL_CTL); in ar5212ChipReset()
950 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, phyPLL); in ar5212ChipReset()
956 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, phyPLL); in ar5212ChipReset()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c701 curPhyPLL = OS_REG_READ(ah, AR_PHY_PLL_CTL); in ar5312ChipReset()
713 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, phyPLL); in ar5312ChipReset()
719 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, phyPLL); in ar5312ChipReset()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300phy.h569 #define AR_PHY_PLL_CTL AR_SM_OFFSET(BB_pll_cntl) macro