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Searched refs:AR_PHY_BB_DPLL2 (Results 1 – 2 of 2) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_reset.c1430 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1432 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1458 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1460 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1470 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, AR_PHY_BB_DPLL2_PLL_PWD, 0x1); in ar9300_init_pll()
1473 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1475 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1485 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1487 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1489 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
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H A Dar9300phy.h1834 #define AR_PHY_BB_DPLL2 AR_PHY_65NM(overlay_0x16180.Poseidon.ch0_BB_DPLL2) macro