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Searched refs:AR_IMR_S3 (Results 1 – 3 of 3) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/
H A Dar5211reg.h59 #define AR_IMR_S3 0x00b0 /* Secondary interrupt mask reg 3 */ macro
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212reg.h56 #define AR_IMR_S3 0x00b0 /* MAC Secondary interrupt mask register 3 */ macro
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300reg.h381 #define AR_IMR_S3 AR_MAC_DMA_OFFSET(MAC_DMA_IMR_S3) macro