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Searched refs:AR_HOSTIF_REG (Results 1 – 9 of 9) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_gpio.c89 addr = AR_HOSTIF_REG(ah, AR_GPIO_OUTPUT_MUX3); in ar9300_gpio_cfg_output_mux()
91 addr = AR_HOSTIF_REG(ah, AR_GPIO_OUTPUT_MUX2); in ar9300_gpio_cfg_output_mux()
93 addr = AR_HOSTIF_REG(ah, AR_GPIO_OUTPUT_MUX1); in ar9300_gpio_cfg_output_mux()
180 AR_HOSTIF_REG(ah, AR_GPIO_INPUT_EN_VAL), AR_GPIO_JTAG_DISABLE); in ar9300_gpio_cfg_output()
230 AR_HOSTIF_REG(ah, AR_GPIO_OE_OUT), in ar9300_gpio_cfg_output()
332 AR_HOSTIF_REG(ah, AR_GPIO_OE_OUT), in ar9300_gpio_cfg_output_led_off()
357 AR_HOSTIF_REG(ah, AR_GPIO_INPUT_EN_VAL), AR_GPIO_JTAG_DISABLE); in ar9300_gpio_cfg_input()
364 AR_HOSTIF_REG(ah, AR_GPIO_OE_OUT), in ar9300_gpio_cfg_input()
383 OS_REG_RMW(ah, AR_HOSTIF_REG(ah, AR_GPIO_OUT), in ar9300_gpio_set()
402 gpio_in = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_GPIO_IN)); in ar9300_gpio_get()
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H A Dar9300_interrupts.c42 host_isr = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_CAUSE)); in ar9300_is_interrupt_pending()
47 host_isr = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_CAUSE)); in ar9300_is_interrupt_pending()
124 async_cause = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_CAUSE)); in ar9300_get_pending_interrupts()
157 ah->ah_syncstate = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_CAUSE)); in ar9300_get_pending_interrupts()
161 OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_CAUSE)) & in ar9300_get_pending_interrupts()
346 AR_HOSTIF_REG(ah, AR_INTR_ASYNC_CAUSE_CLR), async_cause); in ar9300_get_pending_interrupts()
348 (void) OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_CAUSE_CLR)); in ar9300_get_pending_interrupts()
436 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), AR_RC_HOSTIF); in ar9300_get_pending_interrupts()
437 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), 0); in ar9300_get_pending_interrupts()
456 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_CAUSE_CLR), sync_cause); in ar9300_get_pending_interrupts()
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H A Dar9300_attach.c564 val = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_SREV)); in ar9300_read_revisions()
704 ahp->ah_wa_reg_val = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_WA)); in ar9300_attach()
723 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), ahp->ah_wa_reg_val); in ar9300_attach()
2389 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_PCIE_PM_CTRL), in ar9300_attach()
2390 OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_PCIE_PM_CTRL)) | in ar9300_attach()
3155 AR_HOSTIF_REG(ah, AR_PCIE_PM_CTRL), AR_PCIE_PM_CTRL_ENA); in ar9300_config_pci_power_save()
3163 AR_HOSTIF_REG(ah, AR_WA), in ar9300_config_pci_power_save()
3167 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), ahp->ah_wa_reg_val); in ar9300_config_pci_power_save()
4104 AR_HOSTIF_REG(ah, AR_RC) = in ar9300_init_hostif_offsets()
4106 AR_HOSTIF_REG(ah, AR_WA) = in ar9300_init_hostif_offsets()
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H A Dar9300_power.c502 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), ahp->ah_wa_reg_val); in ar9300_set_power_mode_awake()
585 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), in ar9300_set_power_mode_sleep()
643 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), in ar9300_set_power_mode_network_sleep()
1066 wa_reg_val = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_WA)); in ar9300_wow_enable()
1093 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), wa_reg_val); in ar9300_wow_enable()
1099 val = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_PCIE_PM_CTRL)); in ar9300_wow_enable()
1110 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_PCIE_PM_CTRL), val); in ar9300_wow_enable()
1112 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_PCIE_PM_CTRL), val); in ar9300_wow_enable()
1346 val = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_PCIE_PM_CTRL)); in ar9300_wow_enable()
1352 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_PCIE_PM_CTRL), val); in ar9300_wow_enable()
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H A Dar9300_reset.c1693 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), AH9300(ah)->ah_wa_reg_val); in ar9300_set_reset()
1700 tmp_reg = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_CAUSE)); in ar9300_set_reset()
1703 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE), 0); in ar9300_set_reset()
1704 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), AR_RC_HOSTIF); in ar9300_set_reset()
1708 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE), 0); in ar9300_set_reset()
1709 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), AR_RC_HOSTIF); in ar9300_set_reset()
1875 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), 0); in ar9300_set_reset()
1888 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), AH9300(ah)->ah_wa_reg_val); in ar9300_set_reset_power_on()
1936 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_WA), AH9300(ah)->ah_wa_reg_val); in ar9300_set_reset_reg()
2006 OS_REG_RMW(ah, AR_HOSTIF_REG(ah, AR_GPIO_OUTPUT_MUX1), 0x0, 0x1f); in ar9300_phy_disable()
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H A Dar9300_misc.c189 OS_REG_SET_BIT(ah, AR_HOSTIF_REG(ah, AR_RFSILENT), in ar9300_enable_rf_kill()
194 OS_REG_CLR_BIT(ah, AR_HOSTIF_REG(ah, AR_RFSILENT), in ar9300_enable_rf_kill()
201 OS_REG_SET_BIT(ah, AR_HOSTIF_REG(ah, AR_GPIO_INPUT_EN_VAL), in ar9300_enable_rf_kill()
205 OS_REG_CLR_BIT(ah, AR_HOSTIF_REG(ah, AR_GPIO_INPUT_MUX2), in ar9300_enable_rf_kill()
207 OS_REG_SET_BIT(ah, AR_HOSTIF_REG(ah, AR_GPIO_INPUT_MUX2), in ar9300_enable_rf_kill()
429 v = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_SREV)) & AR_SREV_ID; in ar9300_detect_card_present()
432 v = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_SREV)); in ar9300_detect_card_present()
2649 OS_REG_RMW(ah, AR_HOSTIF_REG(ah, AR_GPIO_PDPU), in ar9300_bt_coex_enable()
2674 OS_REG_SET_BIT(ah, AR_HOSTIF_REG(ah, AR_GPIO_INPUT_EN_VAL), in ar9300_init_bt_coex()
2683 AR_HOSTIF_REG(ah, AR_GPIO_INPUT_MUX1), in ar9300_init_bt_coex()
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H A Dar9300_mci.c536 AR_HOSTIF_REG(ah, AR_GPIO_INPUT_EN_VAL), AR_GPIO_JTAG_DISABLE); in ar9300_mci_observation_set_up()
548 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_OBS), 0x4b); in ar9300_mci_observation_set_up()
H A Dar9300_eeprom.c232 AR_HOSTIF_REG(ah, AR_EEPROM_STATUS_DATA), in ar9300_eeprom_read_word()
239 AR_HOSTIF_REG(ah, AR_EEPROM_STATUS_DATA)), AR_EEPROM_STATUS_DATA_VAL); in ar9300_eeprom_read_word()
H A Dar9300reg.h727 #define AR_HOSTIF_REG(_ah, _reg) (AH9300(_ah)->ah_hostifregs._reg) macro