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Searched refs:AR_HORNET_CH0_DDR_DPLL2 (Results 1 – 2 of 2) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300phy.h1822 #define AR_HORNET_CH0_DDR_DPLL2 AR_PHY_65NM(overlay_0x16180.Poseidon.ch0_DDR_DPLL2) macro
H A Dar9300_reset.c1417 OS_REG_WRITE(ah, AR_HORNET_CH0_DDR_DPLL2, 0x18e82f01); in ar9300_init_pll()
1445 OS_REG_WRITE(ah, AR_HORNET_CH0_DDR_DPLL2, 0x19e82f01); in ar9300_init_pll()