1 /*-
2 * BSD LICENSE
3 *
4 * Copyright (c) Intel Corporation. All rights reserved.
5 * Copyright (c) 2017, Western Digital Corporation or its affiliates.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include "nvme_internal.h"
35 #include "nvme_pci.h"
36
37 struct nvme_quirk {
38 struct pci_id id;
39 unsigned int flags;
40 };
41
42 static const struct nvme_quirk nvme_quirks[] = {
43 {
44 { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3702 },
45 NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
46 },
47 {
48 { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3703 },
49 NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
50 },
51 {
52 { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3704 },
53 NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
54 },
55 {
56 { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3705 },
57 NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
58 },
59 {
60 { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x3709 },
61 NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
62 },
63 {
64 { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x370a },
65 NVME_INTEL_QUIRK_READ_LATENCY | NVME_INTEL_QUIRK_WRITE_LATENCY
66 },
67 {
68 { NVME_PCI_VID_MEMBLAZE, 0x0540, NVME_PCI_ANY_ID, NVME_PCI_ANY_ID },
69 NVME_QUIRK_DELAY_BEFORE_CHK_RDY
70 },
71 {
72 { NVME_PCI_VID_INTEL, 0x0953, NVME_PCI_VID_INTEL, 0x370d },
73 NVME_QUIRK_DELAY_AFTER_RDY
74 },
75 {
76 { 0x0000, 0x0000, 0x0000, 0x0000 },
77 0
78 }
79 };
80
81 /*
82 * Compare each field. NVME_PCI_ANY_ID in s1 matches everything.
83 */
nvme_quirks_pci_id_match(const struct pci_id * id,struct pci_device * pdev)84 static bool nvme_quirks_pci_id_match(const struct pci_id *id,
85 struct pci_device *pdev)
86 {
87 if ((id->vendor_id == NVME_PCI_ANY_ID ||
88 id->vendor_id == pdev->vendor_id) &&
89 (id->device_id == NVME_PCI_ANY_ID ||
90 id->device_id == pdev->device_id) &&
91 (id->subvendor_id == NVME_PCI_ANY_ID ||
92 id->subvendor_id == pdev->subvendor_id) &&
93 (id->subdevice_id == NVME_PCI_ANY_ID ||
94 id->subdevice_id == pdev->subdevice_id))
95 return true;
96
97 return false;
98 }
99
nvme_ctrlr_get_quirks(struct pci_device * pdev)100 unsigned int nvme_ctrlr_get_quirks(struct pci_device *pdev)
101 {
102 const struct nvme_quirk *quirk = nvme_quirks;
103
104 while (quirk->id.vendor_id) {
105 if (nvme_quirks_pci_id_match(&quirk->id, pdev))
106 return quirk->flags;
107 quirk++;
108 }
109
110 return 0;
111 }
112