1 /*
2 * Copyright (c) 1992, 1993
3 * The Regents of the University of California. All rights reserved.
4 *
5 * This software was developed by the Computer Systems Engineering group
6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7 * contributed to Berkeley.
8 *
9 * All advertising materials mentioning features or use of this software
10 * must display the following acknowledgement:
11 * This product includes software developed by the University of
12 * California, Lawrence Berkeley Laboratory.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * @(#)fpu_subr.c 8.1 (Berkeley) 6/11/93
39 * $NetBSD: fpu_subr.c,v 1.3 1996/03/14 19:42:01 christos Exp $
40 */
41
42 #include <sys/cdefs.h>
43
44 /*
45 * FPU subroutines.
46 */
47
48 #include <sys/param.h>
49
50 #include "fsr.h"
51 #include "instr.h"
52
53 #include "fpu_arith.h"
54 #include "fpu_emu.h"
55 #include "fpu_extern.h"
56
57 /*
58 * Shift the given number right rsh bits. Any bits that `fall off' will get
59 * shoved into the sticky field; we return the resulting sticky. Note that
60 * shifting NaNs is legal (this will never shift all bits out); a NaN's
61 * sticky field is ignored anyway.
62 */
63 int
__fpu_shr(struct fpn * fp,int rsh)64 __fpu_shr(struct fpn *fp, int rsh)
65 {
66 uint32_t m0, m1, m2, m3, s;
67 int lsh;
68
69 #ifdef DIAGNOSTIC
70 if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
71 __utrap_panic("fpu_rightshift 1");
72 #endif
73
74 m0 = fp->fp_mant[0];
75 m1 = fp->fp_mant[1];
76 m2 = fp->fp_mant[2];
77 m3 = fp->fp_mant[3];
78
79 /* If shifting all the bits out, take a shortcut. */
80 if (rsh >= FP_NMANT) {
81 #ifdef DIAGNOSTIC
82 if ((m0 | m1 | m2 | m3) == 0)
83 __utrap_panic("fpu_rightshift 2");
84 #endif
85 fp->fp_mant[0] = 0;
86 fp->fp_mant[1] = 0;
87 fp->fp_mant[2] = 0;
88 fp->fp_mant[3] = 0;
89 #ifdef notdef
90 if ((m0 | m1 | m2 | m3) == 0)
91 fp->fp_class = FPC_ZERO;
92 else
93 #endif
94 fp->fp_sticky = 1;
95 return (1);
96 }
97
98 /* Squish out full words. */
99 s = fp->fp_sticky;
100 if (rsh >= 32 * 3) {
101 s |= m3 | m2 | m1;
102 m3 = m0, m2 = 0, m1 = 0, m0 = 0;
103 } else if (rsh >= 32 * 2) {
104 s |= m3 | m2;
105 m3 = m1, m2 = m0, m1 = 0, m0 = 0;
106 } else if (rsh >= 32) {
107 s |= m3;
108 m3 = m2, m2 = m1, m1 = m0, m0 = 0;
109 }
110
111 /* Handle any remaining partial word. */
112 if ((rsh &= 31) != 0) {
113 lsh = 32 - rsh;
114 s |= m3 << lsh;
115 m3 = (m3 >> rsh) | (m2 << lsh);
116 m2 = (m2 >> rsh) | (m1 << lsh);
117 m1 = (m1 >> rsh) | (m0 << lsh);
118 m0 >>= rsh;
119 }
120 fp->fp_mant[0] = m0;
121 fp->fp_mant[1] = m1;
122 fp->fp_mant[2] = m2;
123 fp->fp_mant[3] = m3;
124 fp->fp_sticky = s;
125 return (s);
126 }
127
128 /*
129 * Force a number to be normal, i.e., make its fraction have all zero
130 * bits before FP_1, then FP_1, then all 1 bits. This is used for denorms
131 * and (sometimes) for intermediate results.
132 *
133 * Internally, this may use a `supernormal' -- a number whose fp_mant
134 * is greater than or equal to 2.0 -- so as a side effect you can hand it
135 * a supernormal and it will fix it (provided fp->fp_mant[3] == 0).
136 */
137 void
__fpu_norm(struct fpn * fp)138 __fpu_norm(struct fpn *fp)
139 {
140 uint32_t m0, m1, m2, m3, top, sup, nrm;
141 int lsh, rsh, exp;
142
143 exp = fp->fp_exp;
144 m0 = fp->fp_mant[0];
145 m1 = fp->fp_mant[1];
146 m2 = fp->fp_mant[2];
147 m3 = fp->fp_mant[3];
148
149 /* Handle severe subnormals with 32-bit moves. */
150 if (m0 == 0) {
151 if (m1)
152 m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32;
153 else if (m2)
154 m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32;
155 else if (m3)
156 m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32;
157 else {
158 fp->fp_class = FPC_ZERO;
159 return;
160 }
161 }
162
163 /* Now fix any supernormal or remaining subnormal. */
164 nrm = FP_1;
165 sup = nrm << 1;
166 if (m0 >= sup) {
167 /*
168 * We have a supernormal number. We need to shift it right.
169 * We may assume m3==0.
170 */
171 for (rsh = 1, top = m0 >> 1; top >= sup; rsh++) /* XXX slow */
172 top >>= 1;
173 exp += rsh;
174 lsh = 32 - rsh;
175 m3 = m2 << lsh;
176 m2 = (m2 >> rsh) | (m1 << lsh);
177 m1 = (m1 >> rsh) | (m0 << lsh);
178 m0 = top;
179 } else if (m0 < nrm) {
180 /*
181 * We have a regular denorm (a subnormal number), and need
182 * to shift it left.
183 */
184 for (lsh = 1, top = m0 << 1; top < nrm; lsh++) /* XXX slow */
185 top <<= 1;
186 exp -= lsh;
187 rsh = 32 - lsh;
188 m0 = top | (m1 >> rsh);
189 m1 = (m1 << lsh) | (m2 >> rsh);
190 m2 = (m2 << lsh) | (m3 >> rsh);
191 m3 <<= lsh;
192 }
193
194 fp->fp_exp = exp;
195 fp->fp_mant[0] = m0;
196 fp->fp_mant[1] = m1;
197 fp->fp_mant[2] = m2;
198 fp->fp_mant[3] = m3;
199 }
200
201 /*
202 * Concoct a `fresh' Quiet NaN per Appendix N.
203 * As a side effect, we set NV (invalid) for the current exceptions.
204 */
205 struct fpn *
__fpu_newnan(struct fpemu * fe)206 __fpu_newnan(struct fpemu *fe)
207 {
208 struct fpn *fp;
209
210 fe->fe_cx = FSR_NV;
211 fp = &fe->fe_f3;
212 fp->fp_class = FPC_QNAN;
213 fp->fp_sign = 0;
214 fp->fp_mant[0] = FP_1 - 1;
215 fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0;
216 return (fp);
217 }
218