1 /*- 2 * Copyright IBM Corp. 2007 3 * 4 * Authors: 5 * Anthony Liguori <aliguori@us.ibm.com> 6 * 7 * This header is BSD licensed so anyone can use the definitions to implement 8 * compatible drivers/servers. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of IBM nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD$ 34 */ 35 36 #ifndef _VIRTIO_PCI_H 37 #define _VIRTIO_PCI_H 38 39 /* VirtIO PCI vendor/device ID. */ 40 #define VIRTIO_PCI_VENDORID 0x1AF4 41 #define VIRTIO_PCI_DEVICEID_MIN 0x1000 42 #define VIRTIO_PCI_DEVICEID_LEGACY_MAX 0x103F 43 #define VIRTIO_PCI_DEVICEID_MODERN_MIN 0x1040 44 #define VIRTIO_PCI_DEVICEID_MODERN_MAX 0x107F 45 46 /* 47 * VirtIO Header, located in BAR 0. 48 */ 49 #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/ 50 #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */ 51 #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */ 52 #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */ 53 #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */ 54 #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */ 55 #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */ 56 #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading 57 * also clears the register (8, RO) */ 58 /* Only if MSIX is enabled: */ 59 #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */ 60 #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications 61 (16, RW) */ 62 63 /* The bit of the ISR which indicates a device has an interrupt. */ 64 #define VIRTIO_PCI_ISR_INTR 0x1 65 /* The bit of the ISR which indicates a device configuration change. */ 66 #define VIRTIO_PCI_ISR_CONFIG 0x2 67 /* Vector value used to disable MSI for queue. */ 68 #define VIRTIO_MSI_NO_VECTOR 0xFFFF 69 70 /* 71 * The remaining space is defined by each driver as the per-driver 72 * configuration space. 73 */ 74 #define VIRTIO_PCI_CONFIG(bus) \ 75 ((bus->irq_type != VIRTIO_IRQ_LEGACY) ? 24 : 20) 76 77 /* 78 * How many bits to shift physical queue address written to QUEUE_PFN. 79 * 12 is historical, and due to x86 page size. 80 */ 81 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12 82 83 /* The alignment to use between consumer and producer parts of vring. */ 84 #define VIRTIO_PCI_VRING_ALIGN 4096 85 86 87 /* 88 * Virtio 1.0 specific 89 */ 90 91 struct virtio_pci_cap { 92 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ 93 uint8_t cap_next; /* Generic PCI field: next ptr. */ 94 uint8_t cap_len; /* Generic PCI field: capability length */ 95 uint8_t cfg_type; /* Identifies the structure. */ 96 uint8_t bar; /* Where to find it. */ 97 uint8_t padding[3]; /* Pad to full dword. */ 98 uint32_t offset; /* Offset within bar. */ 99 uint32_t length; /* Length of the structure, in bytes. */ 100 } _PACKED; 101 102 /* Common configuration */ 103 #define VIRTIO_PCI_CAP_COMMON_CFG 1 104 /* Notifications */ 105 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2 106 /* ISR Status */ 107 #define VIRTIO_PCI_CAP_ISR_CFG 3 108 /* Device specific configuration */ 109 #define VIRTIO_PCI_CAP_DEVICE_CFG 4 110 /* PCI configuration access */ 111 #define VIRTIO_PCI_CAP_PCI_CFG 5 112 113 struct virtio_pci_notify_cap { 114 struct virtio_pci_cap cap; 115 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ 116 } _PACKED; 117 118 struct virtio_pci_cfg_cap { 119 struct virtio_pci_cap cap; 120 uint8_t pci_cfg_data[4]; /* Data for BAR access. */ 121 } _PACKED; 122 123 struct virtio_pci_common_cfg { 124 /* About the whole device. */ 125 uint32_t device_feature_select; /* read-write */ 126 uint32_t device_feature; /* read-only for driver */ 127 uint32_t driver_feature_select; /* read-write */ 128 uint32_t driver_feature; /* read-write */ 129 uint16_t config_msix_vector; /* read-write */ 130 uint16_t num_queues; /* read-only for driver */ 131 uint8_t device_status; /* read-write */ 132 uint8_t config_generation; /* read-only for driver */ 133 134 /* About a specific virtqueue. */ 135 uint16_t queue_select; /* read-write */ 136 uint16_t queue_size; /* read-write, power of 2, or 0. */ 137 uint16_t queue_msix_vector; /* read-write */ 138 uint16_t queue_enable; /* read-write */ 139 uint16_t queue_notify_off; /* read-only for driver */ 140 uint64_t queue_desc; /* read-write */ 141 uint64_t queue_avail; /* read-write */ 142 uint64_t queue_used; /* read-write */ 143 } _PACKED; 144 145 #endif /* _VIRTIO_PCI_H */ 146