1 /* 2 Copyright (c) 2002, Thomas Kurschel 3 4 5 Part of Radeon driver 6 7 DAC registers 8 */ 9 10 #ifndef _DAC_REGS_H 11 #define _DAC_REGS_H 12 13 #define RADEON_DAC_CNTL 0x0058 14 # define RADEON_DAC_RANGE_CNTL_MASK (3 << 0) 15 # define RADEON_DAC_RANGE_CNTL_PS2 (2 << 0) 16 # define RADEON_DAC_BLANKING (1 << 2) 17 # define RADEON_DAC_CMP_EN (1 << 3) 18 # define RADEON_DAC_CMP_OUTPUT (1 << 7) 19 # define RADEON_DAC_8BIT_EN (1 << 8) 20 # define RADEON_DAC_TVO_EN (1 << 10) 21 # define RADEON_DAC_VGA_ADR_EN (1 << 13) 22 # define RADEON_DAC_PDWN (1 << 15) 23 # define RADEON_DAC_MASK_ALL (0xff << 24) 24 #define RADEON_DAC_CNTL2 0x007c 25 # define RADEON_DAC_CLK_SEL_MASK (1 << 0) 26 # define RADEON_DAC_CLK_SEL_CRTC (0 << 0) 27 # define RADEON_DAC_CLK_SEL_CRTC2 (1 << 0) 28 # define RADEON_DAC2_CLK_SEL_MASK (1 << 1) 29 # define RADEON_DAC2_CLK_SEL_TV (0 << 1) 30 # define RADEON_DAC2_CLK_SEL_CRT (1 << 1) 31 # define RADEON_DAC2_PALETTE_ACC_CTL (1 << 5) 32 # define RADEON_DAC2_CMP_EN (1 << 7) 33 # define RADEON_DAC2_CMP_OUT_R (1 << 8) 34 # define RADEON_DAC2_CMP_OUT_G (1 << 9) 35 # define RADEON_DAC2_CMP_OUT_B (1 << 10) 36 # define RADEON_DAC2_CMP_OUTPUT (1 << 11) 37 #define RADEON_PALETTE_INDEX 0x00b0 38 #define RADEON_PALETTE_DATA 0x00b4 39 #define RADEON_PALETTE_30_DATA 0x00b8 40 41 #define RADEON_DAC_EXT_CNTL 0x0280 42 # define RADEON_DAC2_FORCE_BLANK_OFF_EN (1 << 0) 43 # define RADEON_DAC2_FORCE_DATA_EN (1 << 1) 44 # define RADEON_DAC_FORCE_BLANK_OFF_EN (1 << 4) 45 # define RADEON_DAC_FORCE_DATA_EN (1 << 5) 46 # define RADEON_DAC_FORCE_DATA_SEL_MASK (3 << 6) 47 # define RADEON_DAC_FORCE_DATA_SEL_R (0 << 6) 48 # define RADEON_DAC_FORCE_DATA_SEL_G (1 << 6) 49 # define RADEON_DAC_FORCE_DATA_SEL_B (2 << 6) 50 # define RADEON_DAC_FORCE_DATA_SEL_RGB (3 << 6) 51 # define RADEON_DAC_FORCE_DATA_SHIFT 8 52 # define RADEON_DAC_FORCE_DATA_MASK (0x3ff << 8) 53 #define RADEON_DAC_CRC_SIG 0x02cc 54 55 #define RADEON_DAC_DATA 0x03c9 /* VGA */ 56 #define RADEON_DAC_MASK 0x03c6 /* VGA */ 57 #define RADEON_DAC_R_INDEX 0x03c7 /* VGA */ 58 #define RADEON_DAC_W_INDEX 0x03c8 /* VGA */ 59 60 #define RADEON_DISP_OUTPUT_CNTL 0x0d64 61 # define RADEON_DISP_DAC_SOURCE_MASK 3 62 # define RADEON_DISP_DAC_SOURCE_CRTC1 0 63 # define RADEON_DISP_DAC_SOURCE_CRTC2 1 64 # define RADEON_DISP_DAC_SOURCE_RMX 2 65 # define RADEON_DISP_TVDAC_SOURCE_MASK (3 << 2) 66 # define RADEON_DISP_TVDAC_SOURCE_CRTC2 (1 << 2) 67 # define RADEON_DISP_TV_SOURCE (1 << 16) 68 # define RADEON_DISP_TV_MODE_MASK (3 << 17) 69 # define RADEON_DISP_TV_MODE_888 (0 << 17) 70 # define RADEON_DISP_TV_MODE_565 (1 << 17) 71 # define RADEON_DISP_TV_YG_DITH_EN (1 << 19) 72 # define RADEON_DISP_TV_CBB_CRR_DITH_EN (1 << 20) 73 # define RADEON_DISP_TV_BIT_WIDTH (1 << 21) 74 # define RADEON_DISP_TV_SYNC_MODE_SHIFT 22 75 # define RADEON_DISP_TV_SYNC_MODE_MASK (3 << 22) 76 # define RADEON_DISP_TV_SYNC_COLOR_MASK (3 << 25) 77 78 #define RADEON_DISP_TV_OUT_CNTL 0x0d6c 79 # define RADEON_DISP_TV_OUT_YG_FILTER_MASK (3 << 0) 80 # define RADEON_DISP_TV_OUT_YG_SAMPLE (1 << 2) 81 # define RADEON_DISP_TV_OUT_CrR_FILTER_MASK (3 << 4) 82 # define RADEON_DISP_TV_OUT_CrR_SAMPLE (1 << 6) 83 # define RADEON_DISP_TV_OUT_CbB_FILTER_MASK (3 << 8) 84 # define RADEON_DISP_TV_OUT_CbB_SAMPLE (1 << 10) 85 # define RADEON_DISP_TV_SUBSAMPLE_CNTL_MASK (3 << 12) 86 # define RADEON_DISP_TV_H_DOWNSCALE (1 << 15) 87 # define RADEON_DISP_TV_PATH_SRC (1 << 16) 88 # define RADEON_DISP_TV_COLOR_SPACE (1 << 17) 89 # define RADEON_DISP_TV_DITH_MODE (1 << 18) 90 # define RADEON_DISP_TV_DATA_ZERO_SEL (1 << 19) 91 # define RADEON_DISP_TV_CLKO_SEL (1 << 20) 92 # define RADEON_DISP_TV_CLKO_OUT_EN (1 << 21) 93 # define RADEON_DISP_TV_DOWNSCALE_CNTL (3 << 24) 94 95 96 #define RADEON_DISP_HW_DEBUG 0x0d14 97 # define RADEON_CRT2_DISP1_SEL (1 << 5) 98 99 100 #endif 101