1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 175 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 176 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 177 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 178 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 179 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 180 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 181 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 182 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 183 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 184 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 185 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 186 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 187 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 188 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 189 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 190 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 191 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 192 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 193 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 194 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 195 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 196 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 197 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 198 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 199 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 200 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 201 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 202 203 204 /* 205 * All tables must be byte-packed to match the ACPI specification, since 206 * the tables are provided by the system BIOS. 207 */ 208 #pragma pack(1) 209 210 /* 211 * Note: C bitfields are not used for this reason: 212 * 213 * "Bitfields are great and easy to read, but unfortunately the C language 214 * does not specify the layout of bitfields in memory, which means they are 215 * essentially useless for dealing with packed data in on-disk formats or 216 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 217 * this decision was a design error in C. Ritchie could have picked an order 218 * and stuck with it." Norman Ramsey. 219 * See http://stackoverflow.com/a/1053662/41661 220 */ 221 222 223 /******************************************************************************* 224 * 225 * AEST - Arm Error Source Table 226 * 227 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 228 * September 2020. 229 * 230 ******************************************************************************/ 231 232 typedef struct acpi_table_aest 233 { 234 ACPI_TABLE_HEADER Header; 235 236 } ACPI_TABLE_AEST; 237 238 /* Common Subtable header - one per Node Structure (Subtable) */ 239 240 typedef struct acpi_aest_hdr 241 { 242 UINT8 Type; 243 UINT16 Length; 244 UINT8 Reserved; 245 UINT32 NodeSpecificOffset; 246 UINT32 NodeInterfaceOffset; 247 UINT32 NodeInterruptOffset; 248 UINT32 NodeInterruptCount; 249 UINT64 TimestampRate; 250 UINT64 Reserved1; 251 UINT64 ErrorInjectionRate; 252 253 } ACPI_AEST_HEADER; 254 255 /* Values for Type above */ 256 257 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 258 #define ACPI_AEST_MEMORY_ERROR_NODE 1 259 #define ACPI_AEST_SMMU_ERROR_NODE 2 260 #define ACPI_AEST_VENDOR_ERROR_NODE 3 261 #define ACPI_AEST_GIC_ERROR_NODE 4 262 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 263 264 265 /* 266 * AEST subtables (Error nodes) 267 */ 268 269 /* 0: Processor Error */ 270 271 typedef struct acpi_aest_processor 272 { 273 UINT32 ProcessorId; 274 UINT8 ResourceType; 275 UINT8 Reserved; 276 UINT8 Flags; 277 UINT8 Revision; 278 UINT64 ProcessorAffinity; 279 280 } ACPI_AEST_PROCESSOR; 281 282 /* Values for ResourceType above, related structs below */ 283 284 #define ACPI_AEST_CACHE_RESOURCE 0 285 #define ACPI_AEST_TLB_RESOURCE 1 286 #define ACPI_AEST_GENERIC_RESOURCE 2 287 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 288 289 /* 0R: Processor Cache Resource Substructure */ 290 291 typedef struct acpi_aest_processor_cache 292 { 293 UINT32 CacheReference; 294 UINT32 Reserved; 295 296 } ACPI_AEST_PROCESSOR_CACHE; 297 298 /* Values for CacheType above */ 299 300 #define ACPI_AEST_CACHE_DATA 0 301 #define ACPI_AEST_CACHE_INSTRUCTION 1 302 #define ACPI_AEST_CACHE_UNIFIED 2 303 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 304 305 /* 1R: Processor TLB Resource Substructure */ 306 307 typedef struct acpi_aest_processor_tlb 308 { 309 UINT32 TlbLevel; 310 UINT32 Reserved; 311 312 } ACPI_AEST_PROCESSOR_TLB; 313 314 /* 2R: Processor Generic Resource Substructure */ 315 316 typedef struct acpi_aest_processor_generic 317 { 318 UINT32 Resource; 319 320 } ACPI_AEST_PROCESSOR_GENERIC; 321 322 /* 1: Memory Error */ 323 324 typedef struct acpi_aest_memory 325 { 326 UINT32 SratProximityDomain; 327 328 } ACPI_AEST_MEMORY; 329 330 /* 2: Smmu Error */ 331 332 typedef struct acpi_aest_smmu 333 { 334 UINT32 IortNodeReference; 335 UINT32 SubcomponentReference; 336 337 } ACPI_AEST_SMMU; 338 339 /* 3: Vendor Defined */ 340 341 typedef struct acpi_aest_vendor 342 { 343 UINT32 AcpiHid; 344 UINT32 AcpiUid; 345 UINT8 VendorSpecificData[16]; 346 347 } ACPI_AEST_VENDOR; 348 349 /* 4: Gic Error */ 350 351 typedef struct acpi_aest_gic 352 { 353 UINT32 InterfaceType; 354 UINT32 InstanceId; 355 356 } ACPI_AEST_GIC; 357 358 /* Values for InterfaceType above */ 359 360 #define ACPI_AEST_GIC_CPU 0 361 #define ACPI_AEST_GIC_DISTRIBUTOR 1 362 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 363 #define ACPI_AEST_GIC_ITS 3 364 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 365 366 367 /* Node Interface Structure */ 368 369 typedef struct acpi_aest_node_interface 370 { 371 UINT8 Type; 372 UINT8 Reserved[3]; 373 UINT32 Flags; 374 UINT64 Address; 375 UINT32 ErrorRecordIndex; 376 UINT32 ErrorRecordCount; 377 UINT64 ErrorRecordImplemented; 378 UINT64 ErrorStatusReporting; 379 UINT64 AddressingMode; 380 381 } ACPI_AEST_NODE_INTERFACE; 382 383 /* Values for Type field above */ 384 385 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 386 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 387 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 388 389 /* Node Interrupt Structure */ 390 391 typedef struct acpi_aest_node_interrupt 392 { 393 UINT8 Type; 394 UINT8 Reserved[2]; 395 UINT8 Flags; 396 UINT32 Gsiv; 397 UINT8 IortId; 398 UINT8 Reserved1[3]; 399 400 } ACPI_AEST_NODE_INTERRUPT; 401 402 /* Values for Type field above */ 403 404 #define ACPI_AEST_NODE_FAULT_HANDLING 0 405 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 406 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 407 408 409 /******************************************************************************* 410 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 411 * 412 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 413 * ARM DEN0093 v1.1 414 * 415 ******************************************************************************/ 416 typedef struct acpi_table_agdi 417 { 418 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 419 UINT8 Flags; 420 UINT8 Reserved[3]; 421 UINT32 SdeiEvent; 422 UINT32 Gsiv; 423 424 } ACPI_TABLE_AGDI; 425 426 /* Mask for Flags field above */ 427 428 #define ACPI_AGDI_SIGNALING_MODE (1) 429 430 431 /******************************************************************************* 432 * 433 * APMT - ARM Performance Monitoring Unit Table 434 * 435 * Conforms to: 436 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 437 * ARM DEN0117 v1.0 November 25, 2021 438 * 439 ******************************************************************************/ 440 441 typedef struct acpi_table_apmt { 442 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 443 } ACPI_TABLE_APMT; 444 445 #define ACPI_APMT_NODE_ID_LENGTH 4 446 447 /* 448 * APMT subtables 449 */ 450 typedef struct acpi_apmt_node { 451 UINT16 Length; 452 UINT8 Flags; 453 UINT8 Type; 454 UINT32 Id; 455 UINT64 InstPrimary; 456 UINT32 InstSecondary; 457 UINT64 BaseAddress0; 458 UINT64 BaseAddress1; 459 UINT32 OvflwIrq; 460 UINT32 Reserved; 461 UINT32 OvflwIrqFlags; 462 UINT32 ProcAffinity; 463 UINT32 ImplId; 464 } ACPI_APMT_NODE; 465 466 /* Masks for Flags field above */ 467 468 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 469 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 470 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 471 472 /* Values for Flags dual page field above */ 473 474 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 475 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 476 477 /* Values for Flags processor affinity field above */ 478 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 479 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 480 481 /* Values for Flags 64-bit atomic field above */ 482 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 483 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 484 485 /* Values for Type field above */ 486 487 enum acpi_apmt_node_type { 488 ACPI_APMT_NODE_TYPE_MC = 0x00, 489 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 490 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 491 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 492 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 493 ACPI_APMT_NODE_TYPE_COUNT 494 }; 495 496 /* Masks for ovflw_irq_flags field above */ 497 498 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 499 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 500 501 /* Values for ovflw_irq_flags mode field above */ 502 503 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 504 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 505 506 /* Values for ovflw_irq_flags type field above */ 507 508 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 509 510 511 /******************************************************************************* 512 * 513 * BDAT - BIOS Data ACPI Table 514 * 515 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 516 * Nov 2020 517 * 518 ******************************************************************************/ 519 520 typedef struct acpi_table_bdat 521 { 522 ACPI_TABLE_HEADER Header; 523 ACPI_GENERIC_ADDRESS Gas; 524 525 } ACPI_TABLE_BDAT; 526 527 /******************************************************************************* 528 * 529 * CCEL - CC-Event Log 530 * From: "Guest-Host-Communication Interface (GHCI) for Intel 531 * Trust Domain Extensions (Intel TDX)". Feb 2022 532 * 533 ******************************************************************************/ 534 535 typedef struct acpi_table_ccel 536 { 537 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 538 UINT8 CCType; 539 UINT8 CCSubType; 540 UINT16 Reserved; 541 UINT64 LogAreaMinimumLength; 542 UINT64 LogAreaStartAddress; 543 544 } ACPI_TABLE_CCEL; 545 546 /******************************************************************************* 547 * 548 * IORT - IO Remapping Table 549 * 550 * Conforms to "IO Remapping Table System Software on ARM Platforms", 551 * Document number: ARM DEN 0049E.e, Sep 2022 552 * 553 ******************************************************************************/ 554 555 typedef struct acpi_table_iort 556 { 557 ACPI_TABLE_HEADER Header; 558 UINT32 NodeCount; 559 UINT32 NodeOffset; 560 UINT32 Reserved; 561 562 } ACPI_TABLE_IORT; 563 564 565 /* 566 * IORT subtables 567 */ 568 typedef struct acpi_iort_node 569 { 570 UINT8 Type; 571 UINT16 Length; 572 UINT8 Revision; 573 UINT32 Identifier; 574 UINT32 MappingCount; 575 UINT32 MappingOffset; 576 char NodeData[]; 577 578 } ACPI_IORT_NODE; 579 580 /* Values for subtable Type above */ 581 582 enum AcpiIortNodeType 583 { 584 ACPI_IORT_NODE_ITS_GROUP = 0x00, 585 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 586 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 587 ACPI_IORT_NODE_SMMU = 0x03, 588 ACPI_IORT_NODE_SMMU_V3 = 0x04, 589 ACPI_IORT_NODE_PMCG = 0x05, 590 ACPI_IORT_NODE_RMR = 0x06, 591 }; 592 593 594 typedef struct acpi_iort_id_mapping 595 { 596 UINT32 InputBase; /* Lowest value in input range */ 597 UINT32 IdCount; /* Number of IDs */ 598 UINT32 OutputBase; /* Lowest value in output range */ 599 UINT32 OutputReference; /* A reference to the output node */ 600 UINT32 Flags; 601 602 } ACPI_IORT_ID_MAPPING; 603 604 /* Masks for Flags field above for IORT subtable */ 605 606 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 607 608 609 typedef struct acpi_iort_memory_access 610 { 611 UINT32 CacheCoherency; 612 UINT8 Hints; 613 UINT16 Reserved; 614 UINT8 MemoryFlags; 615 616 } ACPI_IORT_MEMORY_ACCESS; 617 618 /* Values for CacheCoherency field above */ 619 620 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 621 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 622 623 /* Masks for Hints field above */ 624 625 #define ACPI_IORT_HT_TRANSIENT (1) 626 #define ACPI_IORT_HT_WRITE (1<<1) 627 #define ACPI_IORT_HT_READ (1<<2) 628 #define ACPI_IORT_HT_OVERRIDE (1<<3) 629 630 /* Masks for MemoryFlags field above */ 631 632 #define ACPI_IORT_MF_COHERENCY (1) 633 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 634 635 636 /* 637 * IORT node specific subtables 638 */ 639 typedef struct acpi_iort_its_group 640 { 641 UINT32 ItsCount; 642 UINT32 Identifiers[]; /* GIC ITS identifier array */ 643 644 } ACPI_IORT_ITS_GROUP; 645 646 647 typedef struct acpi_iort_named_component 648 { 649 UINT32 NodeFlags; 650 UINT64 MemoryProperties; /* Memory access properties */ 651 UINT8 MemoryAddressLimit; /* Memory address size limit */ 652 char DeviceName[]; /* Path of namespace object */ 653 654 } ACPI_IORT_NAMED_COMPONENT; 655 656 /* Masks for Flags field above */ 657 658 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 659 #define ACPI_IORT_NC_PASID_BITS (31<<1) 660 661 typedef struct acpi_iort_root_complex 662 { 663 UINT64 MemoryProperties; /* Memory access properties */ 664 UINT32 AtsAttribute; 665 UINT32 PciSegmentNumber; 666 UINT8 MemoryAddressLimit; /* Memory address size limit */ 667 UINT16 PasidCapabilities; /* PASID Capabilities */ 668 UINT8 Reserved[]; /* Reserved, must be zero */ 669 670 } ACPI_IORT_ROOT_COMPLEX; 671 672 /* Masks for AtsAttribute field above */ 673 674 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 675 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 676 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 677 678 /* Masks for PasidCapabilities field above */ 679 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 680 681 typedef struct acpi_iort_smmu 682 { 683 UINT64 BaseAddress; /* SMMU base address */ 684 UINT64 Span; /* Length of memory range */ 685 UINT32 Model; 686 UINT32 Flags; 687 UINT32 GlobalInterruptOffset; 688 UINT32 ContextInterruptCount; 689 UINT32 ContextInterruptOffset; 690 UINT32 PmuInterruptCount; 691 UINT32 PmuInterruptOffset; 692 UINT64 Interrupts[]; /* Interrupt array */ 693 694 } ACPI_IORT_SMMU; 695 696 /* Values for Model field above */ 697 698 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 699 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 700 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 701 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 702 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 703 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 704 705 /* Masks for Flags field above */ 706 707 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 708 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 709 710 /* Global interrupt format */ 711 712 typedef struct acpi_iort_smmu_gsi 713 { 714 UINT32 NSgIrpt; 715 UINT32 NSgIrptFlags; 716 UINT32 NSgCfgIrpt; 717 UINT32 NSgCfgIrptFlags; 718 719 } ACPI_IORT_SMMU_GSI; 720 721 722 typedef struct acpi_iort_smmu_v3 723 { 724 UINT64 BaseAddress; /* SMMUv3 base address */ 725 UINT32 Flags; 726 UINT32 Reserved; 727 UINT64 VatosAddress; 728 UINT32 Model; 729 UINT32 EventGsiv; 730 UINT32 PriGsiv; 731 UINT32 GerrGsiv; 732 UINT32 SyncGsiv; 733 UINT32 Pxm; 734 UINT32 IdMappingIndex; 735 736 } ACPI_IORT_SMMU_V3; 737 738 /* Values for Model field above */ 739 740 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 741 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 742 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 743 744 /* Masks for Flags field above */ 745 746 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 747 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 748 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 749 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 750 751 typedef struct acpi_iort_pmcg 752 { 753 UINT64 Page0BaseAddress; 754 UINT32 OverflowGsiv; 755 UINT32 NodeReference; 756 UINT64 Page1BaseAddress; 757 758 } ACPI_IORT_PMCG; 759 760 typedef struct acpi_iort_rmr { 761 UINT32 Flags; 762 UINT32 RmrCount; 763 UINT32 RmrOffset; 764 765 } ACPI_IORT_RMR; 766 767 /* Masks for Flags field above */ 768 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 769 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 770 771 /* 772 * Macro to access the Access Attributes in flags field above: 773 * Access Attributes is encoded in bits 9:2 774 */ 775 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 776 777 /* Values for above Access Attributes */ 778 779 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 780 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 781 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 782 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 783 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 784 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 785 786 typedef struct acpi_iort_rmr_desc { 787 UINT64 BaseAddress; 788 UINT64 Length; 789 UINT32 Reserved; 790 791 } ACPI_IORT_RMR_DESC; 792 793 /******************************************************************************* 794 * 795 * IVRS - I/O Virtualization Reporting Structure 796 * Version 1 797 * 798 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 799 * Revision 1.26, February 2009. 800 * 801 ******************************************************************************/ 802 803 typedef struct acpi_table_ivrs 804 { 805 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 806 UINT32 Info; /* Common virtualization info */ 807 UINT64 Reserved; 808 809 } ACPI_TABLE_IVRS; 810 811 /* Values for Info field above */ 812 813 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 814 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 815 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 816 817 818 /* IVRS subtable header */ 819 820 typedef struct acpi_ivrs_header 821 { 822 UINT8 Type; /* Subtable type */ 823 UINT8 Flags; 824 UINT16 Length; /* Subtable length */ 825 UINT16 DeviceId; /* ID of IOMMU */ 826 827 } ACPI_IVRS_HEADER; 828 829 /* Values for subtable Type above */ 830 831 enum AcpiIvrsType 832 { 833 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 834 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 835 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 836 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 837 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 838 ACPI_IVRS_TYPE_MEMORY3 = 0x22 839 }; 840 841 /* Masks for Flags field above for IVHD subtable */ 842 843 #define ACPI_IVHD_TT_ENABLE (1) 844 #define ACPI_IVHD_PASS_PW (1<<1) 845 #define ACPI_IVHD_RES_PASS_PW (1<<2) 846 #define ACPI_IVHD_ISOC (1<<3) 847 #define ACPI_IVHD_IOTLB (1<<4) 848 849 /* Masks for Flags field above for IVMD subtable */ 850 851 #define ACPI_IVMD_UNITY (1) 852 #define ACPI_IVMD_READ (1<<1) 853 #define ACPI_IVMD_WRITE (1<<2) 854 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 855 856 857 /* 858 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 859 */ 860 861 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 862 863 typedef struct acpi_ivrs_hardware_10 864 { 865 ACPI_IVRS_HEADER Header; 866 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 867 UINT64 BaseAddress; /* IOMMU control registers */ 868 UINT16 PciSegmentGroup; 869 UINT16 Info; /* MSI number and unit ID */ 870 UINT32 FeatureReporting; 871 872 } ACPI_IVRS_HARDWARE1; 873 874 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 875 876 typedef struct acpi_ivrs_hardware_11 877 { 878 ACPI_IVRS_HEADER Header; 879 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 880 UINT64 BaseAddress; /* IOMMU control registers */ 881 UINT16 PciSegmentGroup; 882 UINT16 Info; /* MSI number and unit ID */ 883 UINT32 Attributes; 884 UINT64 EfrRegisterImage; 885 UINT64 Reserved; 886 } ACPI_IVRS_HARDWARE2; 887 888 /* Masks for Info field above */ 889 890 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 891 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 892 893 894 /* 895 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 896 * Upper two bits of the Type field are the (encoded) length of the structure. 897 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 898 * are reserved for future use but not defined. 899 */ 900 typedef struct acpi_ivrs_de_header 901 { 902 UINT8 Type; 903 UINT16 Id; 904 UINT8 DataSetting; 905 906 } ACPI_IVRS_DE_HEADER; 907 908 /* Length of device entry is in the top two bits of Type field above */ 909 910 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 911 912 /* Values for device entry Type field above */ 913 914 enum AcpiIvrsDeviceEntryType 915 { 916 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 917 918 ACPI_IVRS_TYPE_PAD4 = 0, 919 ACPI_IVRS_TYPE_ALL = 1, 920 ACPI_IVRS_TYPE_SELECT = 2, 921 ACPI_IVRS_TYPE_START = 3, 922 ACPI_IVRS_TYPE_END = 4, 923 924 /* 8-byte device entries */ 925 926 ACPI_IVRS_TYPE_PAD8 = 64, 927 ACPI_IVRS_TYPE_NOT_USED = 65, 928 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 929 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 930 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 931 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 932 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 933 934 /* Variable-length device entries */ 935 936 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 937 }; 938 939 /* Values for Data field above */ 940 941 #define ACPI_IVHD_INIT_PASS (1) 942 #define ACPI_IVHD_EINT_PASS (1<<1) 943 #define ACPI_IVHD_NMI_PASS (1<<2) 944 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 945 #define ACPI_IVHD_LINT0_PASS (1<<6) 946 #define ACPI_IVHD_LINT1_PASS (1<<7) 947 948 949 /* Types 0-4: 4-byte device entry */ 950 951 typedef struct acpi_ivrs_device4 952 { 953 ACPI_IVRS_DE_HEADER Header; 954 955 } ACPI_IVRS_DEVICE4; 956 957 /* Types 66-67: 8-byte device entry */ 958 959 typedef struct acpi_ivrs_device8a 960 { 961 ACPI_IVRS_DE_HEADER Header; 962 UINT8 Reserved1; 963 UINT16 UsedId; 964 UINT8 Reserved2; 965 966 } ACPI_IVRS_DEVICE8A; 967 968 /* Types 70-71: 8-byte device entry */ 969 970 typedef struct acpi_ivrs_device8b 971 { 972 ACPI_IVRS_DE_HEADER Header; 973 UINT32 ExtendedData; 974 975 } ACPI_IVRS_DEVICE8B; 976 977 /* Values for ExtendedData above */ 978 979 #define ACPI_IVHD_ATS_DISABLED (1<<31) 980 981 /* Type 72: 8-byte device entry */ 982 983 typedef struct acpi_ivrs_device8c 984 { 985 ACPI_IVRS_DE_HEADER Header; 986 UINT8 Handle; 987 UINT16 UsedId; 988 UINT8 Variety; 989 990 } ACPI_IVRS_DEVICE8C; 991 992 /* Values for Variety field above */ 993 994 #define ACPI_IVHD_IOAPIC 1 995 #define ACPI_IVHD_HPET 2 996 997 /* Type 240: variable-length device entry */ 998 999 typedef struct acpi_ivrs_device_hid 1000 { 1001 ACPI_IVRS_DE_HEADER Header; 1002 UINT64 AcpiHid; 1003 UINT64 AcpiCid; 1004 UINT8 UidType; 1005 UINT8 UidLength; 1006 1007 } ACPI_IVRS_DEVICE_HID; 1008 1009 /* Values for UidType above */ 1010 1011 #define ACPI_IVRS_UID_NOT_PRESENT 0 1012 #define ACPI_IVRS_UID_IS_INTEGER 1 1013 #define ACPI_IVRS_UID_IS_STRING 2 1014 1015 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1016 1017 typedef struct acpi_ivrs_memory 1018 { 1019 ACPI_IVRS_HEADER Header; 1020 UINT16 AuxData; 1021 UINT64 Reserved; 1022 UINT64 StartAddress; 1023 UINT64 MemoryLength; 1024 1025 } ACPI_IVRS_MEMORY; 1026 1027 1028 /******************************************************************************* 1029 * 1030 * LPIT - Low Power Idle Table 1031 * 1032 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1033 * 1034 ******************************************************************************/ 1035 1036 typedef struct acpi_table_lpit 1037 { 1038 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1039 1040 } ACPI_TABLE_LPIT; 1041 1042 1043 /* LPIT subtable header */ 1044 1045 typedef struct acpi_lpit_header 1046 { 1047 UINT32 Type; /* Subtable type */ 1048 UINT32 Length; /* Subtable length */ 1049 UINT16 UniqueId; 1050 UINT16 Reserved; 1051 UINT32 Flags; 1052 1053 } ACPI_LPIT_HEADER; 1054 1055 /* Values for subtable Type above */ 1056 1057 enum AcpiLpitType 1058 { 1059 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1060 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1061 }; 1062 1063 /* Masks for Flags field above */ 1064 1065 #define ACPI_LPIT_STATE_DISABLED (1) 1066 #define ACPI_LPIT_NO_COUNTER (1<<1) 1067 1068 /* 1069 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1070 */ 1071 1072 /* 0x00: Native C-state instruction based LPI structure */ 1073 1074 typedef struct acpi_lpit_native 1075 { 1076 ACPI_LPIT_HEADER Header; 1077 ACPI_GENERIC_ADDRESS EntryTrigger; 1078 UINT32 Residency; 1079 UINT32 Latency; 1080 ACPI_GENERIC_ADDRESS ResidencyCounter; 1081 UINT64 CounterFrequency; 1082 1083 } ACPI_LPIT_NATIVE; 1084 1085 1086 /******************************************************************************* 1087 * 1088 * MADT - Multiple APIC Description Table 1089 * Version 3 1090 * 1091 ******************************************************************************/ 1092 1093 typedef struct acpi_table_madt 1094 { 1095 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1096 UINT32 Address; /* Physical address of local APIC */ 1097 UINT32 Flags; 1098 1099 } ACPI_TABLE_MADT; 1100 1101 /* Masks for Flags field above */ 1102 1103 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1104 1105 /* Values for PCATCompat flag */ 1106 1107 #define ACPI_MADT_DUAL_PIC 1 1108 #define ACPI_MADT_MULTIPLE_APIC 0 1109 1110 1111 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1112 1113 enum AcpiMadtType 1114 { 1115 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1116 ACPI_MADT_TYPE_IO_APIC = 1, 1117 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1118 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1119 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1120 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1121 ACPI_MADT_TYPE_IO_SAPIC = 6, 1122 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1123 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1124 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1125 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1126 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1127 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1128 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1129 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1130 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1131 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1132 ACPI_MADT_TYPE_CORE_PIC = 17, 1133 ACPI_MADT_TYPE_LIO_PIC = 18, 1134 ACPI_MADT_TYPE_HT_PIC = 19, 1135 ACPI_MADT_TYPE_EIO_PIC = 20, 1136 ACPI_MADT_TYPE_MSI_PIC = 21, 1137 ACPI_MADT_TYPE_BIO_PIC = 22, 1138 ACPI_MADT_TYPE_LPC_PIC = 23, 1139 ACPI_MADT_TYPE_RINTC = 24, 1140 ACPI_MADT_TYPE_IMSIC = 25, 1141 ACPI_MADT_TYPE_APLIC = 26, 1142 ACPI_MADT_TYPE_PLIC = 27, 1143 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 1144 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1145 }; 1146 1147 1148 /* 1149 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1150 */ 1151 1152 /* 0: Processor Local APIC */ 1153 1154 typedef struct acpi_madt_local_apic 1155 { 1156 ACPI_SUBTABLE_HEADER Header; 1157 UINT8 ProcessorId; /* ACPI processor id */ 1158 UINT8 Id; /* Processor's local APIC id */ 1159 UINT32 LapicFlags; 1160 1161 } ACPI_MADT_LOCAL_APIC; 1162 1163 1164 /* 1: IO APIC */ 1165 1166 typedef struct acpi_madt_io_apic 1167 { 1168 ACPI_SUBTABLE_HEADER Header; 1169 UINT8 Id; /* I/O APIC ID */ 1170 UINT8 Reserved; /* Reserved - must be zero */ 1171 UINT32 Address; /* APIC physical address */ 1172 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1173 1174 } ACPI_MADT_IO_APIC; 1175 1176 1177 /* 2: Interrupt Override */ 1178 1179 typedef struct acpi_madt_interrupt_override 1180 { 1181 ACPI_SUBTABLE_HEADER Header; 1182 UINT8 Bus; /* 0 - ISA */ 1183 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1184 UINT32 GlobalIrq; /* Global system interrupt */ 1185 UINT16 IntiFlags; 1186 1187 } ACPI_MADT_INTERRUPT_OVERRIDE; 1188 1189 1190 /* 3: NMI Source */ 1191 1192 typedef struct acpi_madt_nmi_source 1193 { 1194 ACPI_SUBTABLE_HEADER Header; 1195 UINT16 IntiFlags; 1196 UINT32 GlobalIrq; /* Global system interrupt */ 1197 1198 } ACPI_MADT_NMI_SOURCE; 1199 1200 1201 /* 4: Local APIC NMI */ 1202 1203 typedef struct acpi_madt_local_apic_nmi 1204 { 1205 ACPI_SUBTABLE_HEADER Header; 1206 UINT8 ProcessorId; /* ACPI processor id */ 1207 UINT16 IntiFlags; 1208 UINT8 Lint; /* LINTn to which NMI is connected */ 1209 1210 } ACPI_MADT_LOCAL_APIC_NMI; 1211 1212 1213 /* 5: Address Override */ 1214 1215 typedef struct acpi_madt_local_apic_override 1216 { 1217 ACPI_SUBTABLE_HEADER Header; 1218 UINT16 Reserved; /* Reserved, must be zero */ 1219 UINT64 Address; /* APIC physical address */ 1220 1221 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1222 1223 1224 /* 6: I/O Sapic */ 1225 1226 typedef struct acpi_madt_io_sapic 1227 { 1228 ACPI_SUBTABLE_HEADER Header; 1229 UINT8 Id; /* I/O SAPIC ID */ 1230 UINT8 Reserved; /* Reserved, must be zero */ 1231 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1232 UINT64 Address; /* SAPIC physical address */ 1233 1234 } ACPI_MADT_IO_SAPIC; 1235 1236 1237 /* 7: Local Sapic */ 1238 1239 typedef struct acpi_madt_local_sapic 1240 { 1241 ACPI_SUBTABLE_HEADER Header; 1242 UINT8 ProcessorId; /* ACPI processor id */ 1243 UINT8 Id; /* SAPIC ID */ 1244 UINT8 Eid; /* SAPIC EID */ 1245 UINT8 Reserved[3]; /* Reserved, must be zero */ 1246 UINT32 LapicFlags; 1247 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1248 char UidString[]; /* String UID - ACPI 3.0 */ 1249 1250 } ACPI_MADT_LOCAL_SAPIC; 1251 1252 1253 /* 8: Platform Interrupt Source */ 1254 1255 typedef struct acpi_madt_interrupt_source 1256 { 1257 ACPI_SUBTABLE_HEADER Header; 1258 UINT16 IntiFlags; 1259 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1260 UINT8 Id; /* Processor ID */ 1261 UINT8 Eid; /* Processor EID */ 1262 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1263 UINT32 GlobalIrq; /* Global system interrupt */ 1264 UINT32 Flags; /* Interrupt Source Flags */ 1265 1266 } ACPI_MADT_INTERRUPT_SOURCE; 1267 1268 /* Masks for Flags field above */ 1269 1270 #define ACPI_MADT_CPEI_OVERRIDE (1) 1271 1272 1273 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1274 1275 typedef struct acpi_madt_local_x2apic 1276 { 1277 ACPI_SUBTABLE_HEADER Header; 1278 UINT16 Reserved; /* Reserved - must be zero */ 1279 UINT32 LocalApicId; /* Processor x2APIC ID */ 1280 UINT32 LapicFlags; 1281 UINT32 Uid; /* ACPI processor UID */ 1282 1283 } ACPI_MADT_LOCAL_X2APIC; 1284 1285 1286 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1287 1288 typedef struct acpi_madt_local_x2apic_nmi 1289 { 1290 ACPI_SUBTABLE_HEADER Header; 1291 UINT16 IntiFlags; 1292 UINT32 Uid; /* ACPI processor UID */ 1293 UINT8 Lint; /* LINTn to which NMI is connected */ 1294 UINT8 Reserved[3]; /* Reserved - must be zero */ 1295 1296 } ACPI_MADT_LOCAL_X2APIC_NMI; 1297 1298 1299 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1300 1301 typedef struct acpi_madt_generic_interrupt 1302 { 1303 ACPI_SUBTABLE_HEADER Header; 1304 UINT16 Reserved; /* Reserved - must be zero */ 1305 UINT32 CpuInterfaceNumber; 1306 UINT32 Uid; 1307 UINT32 Flags; 1308 UINT32 ParkingVersion; 1309 UINT32 PerformanceInterrupt; 1310 UINT64 ParkedAddress; 1311 UINT64 BaseAddress; 1312 UINT64 GicvBaseAddress; 1313 UINT64 GichBaseAddress; 1314 UINT32 VgicInterrupt; 1315 UINT64 GicrBaseAddress; 1316 UINT64 ArmMpidr; 1317 UINT8 EfficiencyClass; 1318 UINT8 Reserved2[1]; 1319 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1320 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1321 1322 } ACPI_MADT_GENERIC_INTERRUPT; 1323 1324 /* Masks for Flags field above */ 1325 1326 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1327 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1328 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1329 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1330 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1331 1332 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1333 1334 typedef struct acpi_madt_generic_distributor 1335 { 1336 ACPI_SUBTABLE_HEADER Header; 1337 UINT16 Reserved; /* Reserved - must be zero */ 1338 UINT32 GicId; 1339 UINT64 BaseAddress; 1340 UINT32 GlobalIrqBase; 1341 UINT8 Version; 1342 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1343 1344 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1345 1346 /* Values for Version field above */ 1347 1348 enum AcpiMadtGicVersion 1349 { 1350 ACPI_MADT_GIC_VERSION_NONE = 0, 1351 ACPI_MADT_GIC_VERSION_V1 = 1, 1352 ACPI_MADT_GIC_VERSION_V2 = 2, 1353 ACPI_MADT_GIC_VERSION_V3 = 3, 1354 ACPI_MADT_GIC_VERSION_V4 = 4, 1355 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1356 }; 1357 1358 1359 /* 13: Generic MSI Frame (ACPI 5.1) */ 1360 1361 typedef struct acpi_madt_generic_msi_frame 1362 { 1363 ACPI_SUBTABLE_HEADER Header; 1364 UINT16 Reserved; /* Reserved - must be zero */ 1365 UINT32 MsiFrameId; 1366 UINT64 BaseAddress; 1367 UINT32 Flags; 1368 UINT16 SpiCount; 1369 UINT16 SpiBase; 1370 1371 } ACPI_MADT_GENERIC_MSI_FRAME; 1372 1373 /* Masks for Flags field above */ 1374 1375 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1376 1377 1378 /* 14: Generic Redistributor (ACPI 5.1) */ 1379 1380 typedef struct acpi_madt_generic_redistributor 1381 { 1382 ACPI_SUBTABLE_HEADER Header; 1383 UINT8 Flags; 1384 UINT8 Reserved; /* reserved - must be zero */ 1385 UINT64 BaseAddress; 1386 UINT32 Length; 1387 1388 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1389 1390 #define ACPI_MADT_GICR_NON_COHERENT (1) 1391 1392 /* 15: Generic Translator (ACPI 6.0) */ 1393 1394 typedef struct acpi_madt_generic_translator 1395 { 1396 ACPI_SUBTABLE_HEADER Header; 1397 UINT8 Flags; 1398 UINT8 Reserved; /* reserved - must be zero */ 1399 UINT32 TranslationId; 1400 UINT64 BaseAddress; 1401 UINT32 Reserved2; 1402 1403 } ACPI_MADT_GENERIC_TRANSLATOR; 1404 1405 #define ACPI_MADT_ITS_NON_COHERENT (1) 1406 1407 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1408 1409 typedef struct acpi_madt_multiproc_wakeup 1410 { 1411 ACPI_SUBTABLE_HEADER Header; 1412 UINT16 MailboxVersion; 1413 UINT32 Reserved; /* reserved - must be zero */ 1414 UINT64 BaseAddress; 1415 1416 } ACPI_MADT_MULTIPROC_WAKEUP; 1417 1418 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1419 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1420 1421 typedef struct acpi_madt_multiproc_wakeup_mailbox 1422 { 1423 UINT16 Command; 1424 UINT16 Reserved; /* reserved - must be zero */ 1425 UINT32 ApicId; 1426 UINT64 WakeupVector; 1427 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1428 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1429 1430 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1431 1432 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1433 1434 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1435 1436 typedef struct acpi_madt_core_pic { 1437 ACPI_SUBTABLE_HEADER Header; 1438 UINT8 Version; 1439 UINT32 ProcessorId; 1440 UINT32 CoreId; 1441 UINT32 Flags; 1442 } ACPI_MADT_CORE_PIC; 1443 1444 /* Values for Version field above */ 1445 1446 enum AcpiMadtCorePicVersion { 1447 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1448 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1449 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1450 }; 1451 1452 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1453 1454 typedef struct acpi_madt_lio_pic { 1455 ACPI_SUBTABLE_HEADER Header; 1456 UINT8 Version; 1457 UINT64 Address; 1458 UINT16 Size; 1459 UINT8 Cascade[2]; 1460 UINT32 CascadeMap[2]; 1461 } ACPI_MADT_LIO_PIC; 1462 1463 /* Values for Version field above */ 1464 1465 enum AcpiMadtLioPicVersion { 1466 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1467 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1468 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1469 }; 1470 1471 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1472 1473 typedef struct acpi_madt_ht_pic { 1474 ACPI_SUBTABLE_HEADER Header; 1475 UINT8 Version; 1476 UINT64 Address; 1477 UINT16 Size; 1478 UINT8 Cascade[8]; 1479 } ACPI_MADT_HT_PIC; 1480 1481 /* Values for Version field above */ 1482 1483 enum AcpiMadtHtPicVersion { 1484 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1485 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1486 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1487 }; 1488 1489 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1490 1491 typedef struct acpi_madt_eio_pic { 1492 ACPI_SUBTABLE_HEADER Header; 1493 UINT8 Version; 1494 UINT8 Cascade; 1495 UINT8 Node; 1496 UINT64 NodeMap; 1497 } ACPI_MADT_EIO_PIC; 1498 1499 /* Values for Version field above */ 1500 1501 enum AcpiMadtEioPicVersion { 1502 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1503 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1504 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1505 }; 1506 1507 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1508 1509 typedef struct acpi_madt_msi_pic { 1510 ACPI_SUBTABLE_HEADER Header; 1511 UINT8 Version; 1512 UINT64 MsgAddress; 1513 UINT32 Start; 1514 UINT32 Count; 1515 } ACPI_MADT_MSI_PIC; 1516 1517 /* Values for Version field above */ 1518 1519 enum AcpiMadtMsiPicVersion { 1520 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1521 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1522 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1523 }; 1524 1525 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1526 1527 typedef struct acpi_madt_bio_pic { 1528 ACPI_SUBTABLE_HEADER Header; 1529 UINT8 Version; 1530 UINT64 Address; 1531 UINT16 Size; 1532 UINT16 Id; 1533 UINT16 GsiBase; 1534 } ACPI_MADT_BIO_PIC; 1535 1536 /* Values for Version field above */ 1537 1538 enum AcpiMadtBioPicVersion { 1539 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1540 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1541 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1542 }; 1543 1544 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1545 1546 typedef struct acpi_madt_lpc_pic { 1547 ACPI_SUBTABLE_HEADER Header; 1548 UINT8 Version; 1549 UINT64 Address; 1550 UINT16 Size; 1551 UINT8 Cascade; 1552 } ACPI_MADT_LPC_PIC; 1553 1554 /* Values for Version field above */ 1555 1556 enum AcpiMadtLpcPicVersion { 1557 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1558 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1559 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1560 }; 1561 1562 /* 24: RISC-V INTC */ 1563 typedef struct acpi_madt_rintc { 1564 ACPI_SUBTABLE_HEADER Header; 1565 UINT8 Version; 1566 UINT8 Reserved; 1567 UINT32 Flags; 1568 UINT64 HartId; 1569 UINT32 Uid; /* ACPI processor UID */ 1570 UINT32 ExtIntcId; /* External INTC Id */ 1571 UINT64 ImsicAddr; /* IMSIC base address */ 1572 UINT32 ImsicSize; /* IMSIC size */ 1573 } ACPI_MADT_RINTC; 1574 1575 /* Values for RISC-V INTC Version field above */ 1576 1577 enum AcpiMadtRintcVersion { 1578 ACPI_MADT_RINTC_VERSION_NONE = 0, 1579 ACPI_MADT_RINTC_VERSION_V1 = 1, 1580 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1581 }; 1582 1583 /* 25: RISC-V IMSIC */ 1584 typedef struct acpi_madt_imsic { 1585 ACPI_SUBTABLE_HEADER Header; 1586 UINT8 Version; 1587 UINT8 Reserved; 1588 UINT32 Flags; 1589 UINT16 NumIds; 1590 UINT16 NumGuestIds; 1591 UINT8 GuestIndexBits; 1592 UINT8 HartIndexBits; 1593 UINT8 GroupIndexBits; 1594 UINT8 GroupIndexShift; 1595 } ACPI_MADT_IMSIC; 1596 1597 /* 26: RISC-V APLIC */ 1598 typedef struct acpi_madt_aplic { 1599 ACPI_SUBTABLE_HEADER Header; 1600 UINT8 Version; 1601 UINT8 Id; 1602 UINT32 Flags; 1603 UINT8 HwId[8]; 1604 UINT16 NumIdcs; 1605 UINT16 NumSources; 1606 UINT32 GsiBase; 1607 UINT64 BaseAddr; 1608 UINT32 Size; 1609 } ACPI_MADT_APLIC; 1610 1611 /* 27: RISC-V PLIC */ 1612 typedef struct acpi_madt_plic { 1613 ACPI_SUBTABLE_HEADER Header; 1614 UINT8 Version; 1615 UINT8 Id; 1616 UINT8 HwId[8]; 1617 UINT16 NumIrqs; 1618 UINT16 MaxPrio; 1619 UINT32 Flags; 1620 UINT32 Size; 1621 UINT64 BaseAddr; 1622 UINT32 GsiBase; 1623 } ACPI_MADT_PLIC; 1624 1625 1626 /* 80: OEM data */ 1627 1628 typedef struct acpi_madt_oem_data 1629 { 1630 ACPI_FLEX_ARRAY(UINT8, OemData); 1631 } ACPI_MADT_OEM_DATA; 1632 1633 1634 /* 1635 * Common flags fields for MADT subtables 1636 */ 1637 1638 /* MADT Local APIC flags */ 1639 1640 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1641 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1642 1643 /* MADT MPS INTI flags (IntiFlags) */ 1644 1645 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1646 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1647 1648 /* Values for MPS INTI flags */ 1649 1650 #define ACPI_MADT_POLARITY_CONFORMS 0 1651 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1652 #define ACPI_MADT_POLARITY_RESERVED 2 1653 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1654 1655 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1656 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1657 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1658 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1659 1660 1661 /******************************************************************************* 1662 * 1663 * MCFG - PCI Memory Mapped Configuration table and subtable 1664 * Version 1 1665 * 1666 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1667 * 1668 ******************************************************************************/ 1669 1670 typedef struct acpi_table_mcfg 1671 { 1672 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1673 UINT8 Reserved[8]; 1674 1675 } ACPI_TABLE_MCFG; 1676 1677 1678 /* Subtable */ 1679 1680 typedef struct acpi_mcfg_allocation 1681 { 1682 UINT64 Address; /* Base address, processor-relative */ 1683 UINT16 PciSegment; /* PCI segment group number */ 1684 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1685 UINT8 EndBusNumber; /* Final PCI Bus number */ 1686 UINT32 Reserved; 1687 1688 } ACPI_MCFG_ALLOCATION; 1689 1690 1691 /******************************************************************************* 1692 * 1693 * MCHI - Management Controller Host Interface Table 1694 * Version 1 1695 * 1696 * Conforms to "Management Component Transport Protocol (MCTP) Host 1697 * Interface Specification", Revision 1.0.0a, October 13, 2009 1698 * 1699 ******************************************************************************/ 1700 1701 typedef struct acpi_table_mchi 1702 { 1703 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1704 UINT8 InterfaceType; 1705 UINT8 Protocol; 1706 UINT64 ProtocolData; 1707 UINT8 InterruptType; 1708 UINT8 Gpe; 1709 UINT8 PciDeviceFlag; 1710 UINT32 GlobalInterrupt; 1711 ACPI_GENERIC_ADDRESS ControlRegister; 1712 UINT8 PciSegment; 1713 UINT8 PciBus; 1714 UINT8 PciDevice; 1715 UINT8 PciFunction; 1716 1717 } ACPI_TABLE_MCHI; 1718 1719 /******************************************************************************* 1720 * 1721 * MPAM - Memory System Resource Partitioning and Monitoring 1722 * 1723 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1724 * Document number: ARM DEN 0065, December, 2022. 1725 * 1726 ******************************************************************************/ 1727 1728 /* MPAM RIS locator types. Table 11, Location types */ 1729 enum AcpiMpamLocatorType { 1730 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1731 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1732 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1733 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1734 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1735 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1736 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1737 }; 1738 1739 /* MPAM Functional dependency descriptor. Table 10 */ 1740 typedef struct acpi_mpam_func_deps 1741 { 1742 UINT32 Producer; 1743 UINT32 Reserved; 1744 } ACPI_MPAM_FUNC_DEPS; 1745 1746 /* MPAM Processor cache locator descriptor. Table 13 */ 1747 typedef struct acpi_mpam_resource_cache_locator 1748 { 1749 UINT64 CacheReference; 1750 UINT32 Reserved; 1751 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 1752 1753 /* MPAM Memory locator descriptor. Table 14 */ 1754 typedef struct acpi_mpam_resource_memory_locator 1755 { 1756 UINT64 ProximityDomain; 1757 UINT32 Reserved; 1758 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 1759 1760 /* MPAM SMMU locator descriptor. Table 15 */ 1761 typedef struct acpi_mpam_resource_smmu_locator 1762 { 1763 UINT64 SmmuInterface; 1764 UINT32 Reserved; 1765 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 1766 1767 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1768 typedef struct acpi_mpam_resource_memcache_locator 1769 { 1770 UINT8 Reserved[7]; 1771 UINT8 Level; 1772 UINT32 Reference; 1773 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 1774 1775 /* MPAM ACPI device locator descriptor. Table 17 */ 1776 typedef struct acpi_mpam_resource_acpi_locator 1777 { 1778 UINT64 AcpiHwId; 1779 UINT32 AcpiUniqueId; 1780 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 1781 1782 /* MPAM Interconnect locator descriptor. Table 18 */ 1783 typedef struct acpi_mpam_resource_interconnect_locator 1784 { 1785 UINT64 InterConnectDescTblOff; 1786 UINT32 Reserved; 1787 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 1788 1789 /* MPAM Locator structure. Table 12 */ 1790 typedef struct acpi_mpam_resource_generic_locator 1791 { 1792 UINT64 Descriptor1; 1793 UINT32 Descriptor2; 1794 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 1795 1796 typedef union acpi_mpam_resource_locator 1797 { 1798 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 1799 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 1800 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 1801 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 1802 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 1803 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 1804 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 1805 } ACPI_MPAM_RESOURCE_LOCATOR; 1806 1807 /* Memory System Component Resource Node Structure Table 9 */ 1808 typedef struct acpi_mpam_resource_node 1809 { 1810 UINT32 Identifier; 1811 UINT8 RISIndex; 1812 UINT16 Reserved1; 1813 UINT8 LocatorType; 1814 ACPI_MPAM_RESOURCE_LOCATOR Locator; 1815 UINT32 NumFunctionalDeps; 1816 } ACPI_MPAM_RESOURCE_NODE; 1817 1818 /* Memory System Component (MSC) Node Structure. Table 4 */ 1819 typedef struct acpi_mpam_msc_node 1820 { 1821 UINT16 Length; 1822 UINT8 InterfaceType; 1823 UINT8 Reserved; 1824 UINT32 Identifier; 1825 UINT64 BaseAddress; 1826 UINT32 MMIOSize; 1827 UINT32 OverflowInterrupt; 1828 UINT32 OverflowInterruptFlags; 1829 UINT32 Reserved1; 1830 UINT32 OverflowInterruptAffinity; 1831 UINT32 ErrorInterrupt; 1832 UINT32 ErrorInterruptFlags; 1833 UINT32 Reserved2; 1834 UINT32 ErrorInterruptAffinity; 1835 UINT32 MaxNrdyUsec; 1836 UINT64 HardwareIdLinkedDevice; 1837 UINT32 InstanceIdLinkedDevice; 1838 UINT32 NumResouceNodes; 1839 } ACPI_MPAM_MSC_NODE; 1840 1841 typedef struct acpi_table_mpam 1842 { 1843 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1844 } ACPI_TABLE_MPAM; 1845 1846 /******************************************************************************* 1847 * 1848 * MPST - Memory Power State Table (ACPI 5.0) 1849 * Version 1 1850 * 1851 ******************************************************************************/ 1852 1853 #define ACPI_MPST_CHANNEL_INFO \ 1854 UINT8 ChannelId; \ 1855 UINT8 Reserved1[3]; \ 1856 UINT16 PowerNodeCount; \ 1857 UINT16 Reserved2; 1858 1859 /* Main table */ 1860 1861 typedef struct acpi_table_mpst 1862 { 1863 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1864 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1865 1866 } ACPI_TABLE_MPST; 1867 1868 1869 /* Memory Platform Communication Channel Info */ 1870 1871 typedef struct acpi_mpst_channel 1872 { 1873 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1874 1875 } ACPI_MPST_CHANNEL; 1876 1877 1878 /* Memory Power Node Structure */ 1879 1880 typedef struct acpi_mpst_power_node 1881 { 1882 UINT8 Flags; 1883 UINT8 Reserved1; 1884 UINT16 NodeId; 1885 UINT32 Length; 1886 UINT64 RangeAddress; 1887 UINT64 RangeLength; 1888 UINT32 NumPowerStates; 1889 UINT32 NumPhysicalComponents; 1890 1891 } ACPI_MPST_POWER_NODE; 1892 1893 /* Values for Flags field above */ 1894 1895 #define ACPI_MPST_ENABLED 1 1896 #define ACPI_MPST_POWER_MANAGED 2 1897 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1898 1899 1900 /* Memory Power State Structure (follows POWER_NODE above) */ 1901 1902 typedef struct acpi_mpst_power_state 1903 { 1904 UINT8 PowerState; 1905 UINT8 InfoIndex; 1906 1907 } ACPI_MPST_POWER_STATE; 1908 1909 1910 /* Physical Component ID Structure (follows POWER_STATE above) */ 1911 1912 typedef struct acpi_mpst_component 1913 { 1914 UINT16 ComponentId; 1915 1916 } ACPI_MPST_COMPONENT; 1917 1918 1919 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1920 1921 typedef struct acpi_mpst_data_hdr 1922 { 1923 UINT16 CharacteristicsCount; 1924 UINT16 Reserved; 1925 1926 } ACPI_MPST_DATA_HDR; 1927 1928 typedef struct acpi_mpst_power_data 1929 { 1930 UINT8 StructureId; 1931 UINT8 Flags; 1932 UINT16 Reserved1; 1933 UINT32 AveragePower; 1934 UINT32 PowerSaving; 1935 UINT64 ExitLatency; 1936 UINT64 Reserved2; 1937 1938 } ACPI_MPST_POWER_DATA; 1939 1940 /* Values for Flags field above */ 1941 1942 #define ACPI_MPST_PRESERVE 1 1943 #define ACPI_MPST_AUTOENTRY 2 1944 #define ACPI_MPST_AUTOEXIT 4 1945 1946 1947 /* Shared Memory Region (not part of an ACPI table) */ 1948 1949 typedef struct acpi_mpst_shared 1950 { 1951 UINT32 Signature; 1952 UINT16 PccCommand; 1953 UINT16 PccStatus; 1954 UINT32 CommandRegister; 1955 UINT32 StatusRegister; 1956 UINT32 PowerStateId; 1957 UINT32 PowerNodeId; 1958 UINT64 EnergyConsumed; 1959 UINT64 AveragePower; 1960 1961 } ACPI_MPST_SHARED; 1962 1963 1964 /******************************************************************************* 1965 * 1966 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1967 * Version 1 1968 * 1969 ******************************************************************************/ 1970 1971 typedef struct acpi_table_msct 1972 { 1973 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1974 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1975 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1976 UINT32 MaxClockDomains; /* Max number of clock domains */ 1977 UINT64 MaxAddress; /* Max physical address in system */ 1978 1979 } ACPI_TABLE_MSCT; 1980 1981 1982 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1983 1984 typedef struct acpi_msct_proximity 1985 { 1986 UINT8 Revision; 1987 UINT8 Length; 1988 UINT32 RangeStart; /* Start of domain range */ 1989 UINT32 RangeEnd; /* End of domain range */ 1990 UINT32 ProcessorCapacity; 1991 UINT64 MemoryCapacity; /* In bytes */ 1992 1993 } ACPI_MSCT_PROXIMITY; 1994 1995 1996 /******************************************************************************* 1997 * 1998 * MSDM - Microsoft Data Management table 1999 * 2000 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 2001 * November 29, 2011. Copyright 2011 Microsoft 2002 * 2003 ******************************************************************************/ 2004 2005 /* Basic MSDM table is only the common ACPI header */ 2006 2007 typedef struct acpi_table_msdm 2008 { 2009 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2010 2011 } ACPI_TABLE_MSDM; 2012 2013 2014 /******************************************************************************* 2015 * 2016 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 2017 * Version 1 2018 * 2019 ******************************************************************************/ 2020 2021 typedef struct acpi_table_nfit 2022 { 2023 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2024 UINT32 Reserved; /* Reserved, must be zero */ 2025 2026 } ACPI_TABLE_NFIT; 2027 2028 /* Subtable header for NFIT */ 2029 2030 typedef struct acpi_nfit_header 2031 { 2032 UINT16 Type; 2033 UINT16 Length; 2034 2035 } ACPI_NFIT_HEADER; 2036 2037 2038 /* Values for subtable type in ACPI_NFIT_HEADER */ 2039 2040 enum AcpiNfitType 2041 { 2042 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 2043 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 2044 ACPI_NFIT_TYPE_INTERLEAVE = 2, 2045 ACPI_NFIT_TYPE_SMBIOS = 3, 2046 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 2047 ACPI_NFIT_TYPE_DATA_REGION = 5, 2048 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 2049 ACPI_NFIT_TYPE_CAPABILITIES = 7, 2050 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 2051 }; 2052 2053 /* 2054 * NFIT Subtables 2055 */ 2056 2057 /* 0: System Physical Address Range Structure */ 2058 2059 typedef struct acpi_nfit_system_address 2060 { 2061 ACPI_NFIT_HEADER Header; 2062 UINT16 RangeIndex; 2063 UINT16 Flags; 2064 UINT32 Reserved; /* Reserved, must be zero */ 2065 UINT32 ProximityDomain; 2066 UINT8 RangeGuid[16]; 2067 UINT64 Address; 2068 UINT64 Length; 2069 UINT64 MemoryMapping; 2070 UINT64 LocationCookie; /* ACPI 6.4 */ 2071 2072 } ACPI_NFIT_SYSTEM_ADDRESS; 2073 2074 /* Flags */ 2075 2076 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2077 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2078 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2079 2080 /* Range Type GUIDs appear in the include/acuuid.h file */ 2081 2082 2083 /* 1: Memory Device to System Address Range Map Structure */ 2084 2085 typedef struct acpi_nfit_memory_map 2086 { 2087 ACPI_NFIT_HEADER Header; 2088 UINT32 DeviceHandle; 2089 UINT16 PhysicalId; 2090 UINT16 RegionId; 2091 UINT16 RangeIndex; 2092 UINT16 RegionIndex; 2093 UINT64 RegionSize; 2094 UINT64 RegionOffset; 2095 UINT64 Address; 2096 UINT16 InterleaveIndex; 2097 UINT16 InterleaveWays; 2098 UINT16 Flags; 2099 UINT16 Reserved; /* Reserved, must be zero */ 2100 2101 } ACPI_NFIT_MEMORY_MAP; 2102 2103 /* Flags */ 2104 2105 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2106 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2107 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2108 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2109 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2110 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2111 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2112 2113 2114 /* 2: Interleave Structure */ 2115 2116 typedef struct acpi_nfit_interleave 2117 { 2118 ACPI_NFIT_HEADER Header; 2119 UINT16 InterleaveIndex; 2120 UINT16 Reserved; /* Reserved, must be zero */ 2121 UINT32 LineCount; 2122 UINT32 LineSize; 2123 UINT32 LineOffset[]; /* Variable length */ 2124 2125 } ACPI_NFIT_INTERLEAVE; 2126 2127 2128 /* 3: SMBIOS Management Information Structure */ 2129 2130 typedef struct acpi_nfit_smbios 2131 { 2132 ACPI_NFIT_HEADER Header; 2133 UINT32 Reserved; /* Reserved, must be zero */ 2134 UINT8 Data[]; /* Variable length */ 2135 2136 } ACPI_NFIT_SMBIOS; 2137 2138 2139 /* 4: NVDIMM Control Region Structure */ 2140 2141 typedef struct acpi_nfit_control_region 2142 { 2143 ACPI_NFIT_HEADER Header; 2144 UINT16 RegionIndex; 2145 UINT16 VendorId; 2146 UINT16 DeviceId; 2147 UINT16 RevisionId; 2148 UINT16 SubsystemVendorId; 2149 UINT16 SubsystemDeviceId; 2150 UINT16 SubsystemRevisionId; 2151 UINT8 ValidFields; 2152 UINT8 ManufacturingLocation; 2153 UINT16 ManufacturingDate; 2154 UINT8 Reserved[2]; /* Reserved, must be zero */ 2155 UINT32 SerialNumber; 2156 UINT16 Code; 2157 UINT16 Windows; 2158 UINT64 WindowSize; 2159 UINT64 CommandOffset; 2160 UINT64 CommandSize; 2161 UINT64 StatusOffset; 2162 UINT64 StatusSize; 2163 UINT16 Flags; 2164 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2165 2166 } ACPI_NFIT_CONTROL_REGION; 2167 2168 /* Flags */ 2169 2170 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2171 2172 /* ValidFields bits */ 2173 2174 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2175 2176 2177 /* 5: NVDIMM Block Data Window Region Structure */ 2178 2179 typedef struct acpi_nfit_data_region 2180 { 2181 ACPI_NFIT_HEADER Header; 2182 UINT16 RegionIndex; 2183 UINT16 Windows; 2184 UINT64 Offset; 2185 UINT64 Size; 2186 UINT64 Capacity; 2187 UINT64 StartAddress; 2188 2189 } ACPI_NFIT_DATA_REGION; 2190 2191 2192 /* 6: Flush Hint Address Structure */ 2193 2194 typedef struct acpi_nfit_flush_address 2195 { 2196 ACPI_NFIT_HEADER Header; 2197 UINT32 DeviceHandle; 2198 UINT16 HintCount; 2199 UINT8 Reserved[6]; /* Reserved, must be zero */ 2200 UINT64 HintAddress[]; /* Variable length */ 2201 2202 } ACPI_NFIT_FLUSH_ADDRESS; 2203 2204 2205 /* 7: Platform Capabilities Structure */ 2206 2207 typedef struct acpi_nfit_capabilities 2208 { 2209 ACPI_NFIT_HEADER Header; 2210 UINT8 HighestCapability; 2211 UINT8 Reserved[3]; /* Reserved, must be zero */ 2212 UINT32 Capabilities; 2213 UINT32 Reserved2; 2214 2215 } ACPI_NFIT_CAPABILITIES; 2216 2217 /* Capabilities Flags */ 2218 2219 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2220 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2221 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2222 2223 2224 /* 2225 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2226 */ 2227 typedef struct nfit_device_handle 2228 { 2229 UINT32 Handle; 2230 2231 } NFIT_DEVICE_HANDLE; 2232 2233 /* Device handle construction and extraction macros */ 2234 2235 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2236 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2237 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2238 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2239 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2240 2241 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2242 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2243 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2244 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2245 #define ACPI_NFIT_NODE_ID_OFFSET 16 2246 2247 /* Macro to construct a NFIT/NVDIMM device handle */ 2248 2249 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2250 ((dimm) | \ 2251 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2252 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2253 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2254 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2255 2256 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2257 2258 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2259 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2260 2261 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2262 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2263 2264 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2265 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2266 2267 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2268 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2269 2270 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2271 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2272 2273 2274 /******************************************************************************* 2275 * 2276 * NHLT - Non HDAudio Link Table 2277 * Version 1 2278 * 2279 ******************************************************************************/ 2280 2281 typedef struct acpi_table_nhlt 2282 { 2283 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2284 UINT8 EndpointsCount; 2285 /* 2286 * ACPI_NHLT_ENDPOINT Endpoints[]; 2287 * ACPI_NHLT_CONFIG OEDConfig; 2288 */ 2289 2290 } ACPI_TABLE_NHLT; 2291 2292 typedef struct acpi_nhlt_endpoint 2293 { 2294 UINT32 Length; 2295 UINT8 LinkType; 2296 UINT8 InstanceId; 2297 UINT16 VendorId; 2298 UINT16 DeviceId; 2299 UINT16 RevisionId; 2300 UINT32 SubsystemId; 2301 UINT8 DeviceType; 2302 UINT8 Direction; 2303 UINT8 VirtualBusId; 2304 /* 2305 * ACPI_NHLT_CONFIG DeviceConfig; 2306 * ACPI_NHLT_FORMATS_CONFIG FormatsConfig; 2307 * ACPI_NHLT_DEVICES_INFO DevicesInfo; 2308 */ 2309 2310 } ACPI_NHLT_ENDPOINT; 2311 2312 /* Values for LinkType field above */ 2313 2314 #define ACPI_NHLT_LINKTYPE_HDA 0 2315 #define ACPI_NHLT_LINKTYPE_DSP 1 2316 #define ACPI_NHLT_LINKTYPE_PDM 2 2317 #define ACPI_NHLT_LINKTYPE_SSP 3 2318 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 2319 #define ACPI_NHLT_LINKTYPE_SDW 5 2320 #define ACPI_NHLT_LINKTYPE_UAOL 6 2321 2322 /* Values for DeviceId field above */ 2323 2324 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 2325 #define ACPI_NHLT_DEVICEID_BT 0xAE30 2326 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 2327 2328 /* Values for DeviceType field above */ 2329 2330 /* Device types unique to endpoint of LinkType=PDM */ 2331 #define ACPI_NHLT_DEVICETYPE_PDM 0 2332 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 2333 /* Device types unique to endpoint of LinkType=SSP */ 2334 #define ACPI_NHLT_DEVICETYPE_BT 0 2335 #define ACPI_NHLT_DEVICETYPE_FM 1 2336 #define ACPI_NHLT_DEVICETYPE_MODEM 2 2337 #define ACPI_NHLT_DEVICETYPE_CODEC 4 2338 2339 /* Values for Direction field above */ 2340 2341 #define ACPI_NHLT_DIR_RENDER 0 2342 #define ACPI_NHLT_DIR_CAPTURE 1 2343 2344 typedef struct acpi_nhlt_config 2345 { 2346 UINT32 CapabilitiesSize; 2347 UINT8 Capabilities[1]; 2348 2349 } ACPI_NHLT_CONFIG; 2350 2351 typedef struct acpi_nhlt_gendevice_config 2352 { 2353 UINT8 VirtualSlot; 2354 UINT8 ConfigType; 2355 2356 } ACPI_NHLT_GENDEVICE_CONFIG; 2357 2358 /* Values for ConfigType field above */ 2359 2360 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 2361 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 2362 2363 typedef struct acpi_nhlt_micdevice_config 2364 { 2365 UINT8 VirtualSlot; 2366 UINT8 ConfigType; 2367 UINT8 ArrayType; 2368 2369 } ACPI_NHLT_MICDEVICE_CONFIG; 2370 2371 /* Values for ArrayType field above */ 2372 2373 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 2374 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 2375 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 2376 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 2377 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 2378 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 2379 2380 typedef struct acpi_nhlt_vendor_mic_config 2381 { 2382 UINT8 Type; 2383 UINT8 Panel; 2384 UINT16 SpeakerPositionDistance; /* mm */ 2385 UINT16 HorizontalOffset; /* mm */ 2386 UINT16 VerticalOffset; /* mm */ 2387 UINT8 FrequencyLowBand; /* 5*Hz */ 2388 UINT8 FrequencyHighBand; /* 500*Hz */ 2389 UINT16 DirectionAngle; /* -180 - +180 */ 2390 UINT16 ElevationAngle; /* -180 - +180 */ 2391 UINT16 WorkVerticalAngleBegin; /* -180 - +180 with 2 deg step */ 2392 UINT16 WorkVerticalAngleEnd; /* -180 - +180 with 2 deg step */ 2393 UINT16 WorkHorizontalAngleBegin; /* -180 - +180 with 2 deg step */ 2394 UINT16 WorkHorizontalAngleEnd; /* -180 - +180 with 2 deg step */ 2395 2396 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2397 2398 /* Values for Type field above */ 2399 2400 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2401 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2402 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2403 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2404 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2405 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2406 #define ACPI_NHLT_MICTYPE_RESERVED 6 2407 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2408 2409 /* Values for Panel field above */ 2410 2411 #define ACPI_NHLT_MICLOCATION_TOP 0 2412 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2413 #define ACPI_NHLT_MICLOCATION_LEFT 2 2414 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2415 #define ACPI_NHLT_MICLOCATION_FRONT 4 2416 #define ACPI_NHLT_MICLOCATION_REAR 5 2417 2418 typedef struct acpi_nhlt_vendor_micdevice_config 2419 { 2420 UINT8 VirtualSlot; 2421 UINT8 ConfigType; 2422 UINT8 ArrayType; 2423 UINT8 MicsCount; 2424 ACPI_NHLT_VENDOR_MIC_CONFIG Mics[]; 2425 2426 } ACPI_NHLT_VENDOR_MICDEVICE_CONFIG; 2427 2428 typedef union acpi_nhlt_device_config 2429 { 2430 UINT8 VirtualSlot; 2431 ACPI_NHLT_GENDEVICE_CONFIG Gen; 2432 ACPI_NHLT_MICDEVICE_CONFIG Mic; 2433 ACPI_NHLT_VENDOR_MICDEVICE_CONFIG VendorMic; 2434 2435 } ACPI_NHLT_DEVICE_CONFIG; 2436 2437 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 2438 typedef struct acpi_nhlt_wave_formatext 2439 { 2440 UINT16 FormatTag; 2441 UINT16 ChannelCount; 2442 UINT32 SamplesPerSec; 2443 UINT32 AvgBytesPerSec; 2444 UINT16 BlockAlign; 2445 UINT16 BitsPerSample; 2446 UINT16 ExtraFormatSize; 2447 UINT16 ValidBitsPerSample; 2448 UINT32 ChannelMask; 2449 UINT8 Subformat[16]; 2450 2451 } ACPI_NHLT_WAVE_FORMATEXT; 2452 2453 typedef struct acpi_nhlt_format_config 2454 { 2455 ACPI_NHLT_WAVE_FORMATEXT Format; 2456 ACPI_NHLT_CONFIG Config; 2457 2458 } ACPI_NHLT_FORMAT_CONFIG; 2459 2460 typedef struct acpi_nhlt_formats_config 2461 { 2462 UINT8 FormatsCount; 2463 ACPI_NHLT_FORMAT_CONFIG Formats[]; 2464 2465 } ACPI_NHLT_FORMATS_CONFIG; 2466 2467 typedef struct acpi_nhlt_device_info 2468 { 2469 UINT8 Id[16]; 2470 UINT8 InstanceId; 2471 UINT8 PortId; 2472 2473 } ACPI_NHLT_DEVICE_INFO; 2474 2475 typedef struct acpi_nhlt_devices_info 2476 { 2477 UINT8 DevicesCount; 2478 ACPI_NHLT_DEVICE_INFO Devices[]; 2479 2480 } ACPI_NHLT_DEVICES_INFO; 2481 2482 2483 /******************************************************************************* 2484 * 2485 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2486 * Version 2 (ACPI 6.2) 2487 * 2488 ******************************************************************************/ 2489 2490 typedef struct acpi_table_pcct 2491 { 2492 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2493 UINT32 Flags; 2494 UINT64 Reserved; 2495 2496 } ACPI_TABLE_PCCT; 2497 2498 /* Values for Flags field above */ 2499 2500 #define ACPI_PCCT_DOORBELL 1 2501 2502 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2503 2504 enum AcpiPcctType 2505 { 2506 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2507 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2508 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2509 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2510 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2511 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2512 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2513 }; 2514 2515 /* 2516 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2517 */ 2518 2519 /* 0: Generic Communications Subspace */ 2520 2521 typedef struct acpi_pcct_subspace 2522 { 2523 ACPI_SUBTABLE_HEADER Header; 2524 UINT8 Reserved[6]; 2525 UINT64 BaseAddress; 2526 UINT64 Length; 2527 ACPI_GENERIC_ADDRESS DoorbellRegister; 2528 UINT64 PreserveMask; 2529 UINT64 WriteMask; 2530 UINT32 Latency; 2531 UINT32 MaxAccessRate; 2532 UINT16 MinTurnaroundTime; 2533 2534 } ACPI_PCCT_SUBSPACE; 2535 2536 2537 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2538 2539 typedef struct acpi_pcct_hw_reduced 2540 { 2541 ACPI_SUBTABLE_HEADER Header; 2542 UINT32 PlatformInterrupt; 2543 UINT8 Flags; 2544 UINT8 Reserved; 2545 UINT64 BaseAddress; 2546 UINT64 Length; 2547 ACPI_GENERIC_ADDRESS DoorbellRegister; 2548 UINT64 PreserveMask; 2549 UINT64 WriteMask; 2550 UINT32 Latency; 2551 UINT32 MaxAccessRate; 2552 UINT16 MinTurnaroundTime; 2553 2554 } ACPI_PCCT_HW_REDUCED; 2555 2556 2557 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2558 2559 typedef struct acpi_pcct_hw_reduced_type2 2560 { 2561 ACPI_SUBTABLE_HEADER Header; 2562 UINT32 PlatformInterrupt; 2563 UINT8 Flags; 2564 UINT8 Reserved; 2565 UINT64 BaseAddress; 2566 UINT64 Length; 2567 ACPI_GENERIC_ADDRESS DoorbellRegister; 2568 UINT64 PreserveMask; 2569 UINT64 WriteMask; 2570 UINT32 Latency; 2571 UINT32 MaxAccessRate; 2572 UINT16 MinTurnaroundTime; 2573 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2574 UINT64 AckPreserveMask; 2575 UINT64 AckWriteMask; 2576 2577 } ACPI_PCCT_HW_REDUCED_TYPE2; 2578 2579 2580 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2581 2582 typedef struct acpi_pcct_ext_pcc_master 2583 { 2584 ACPI_SUBTABLE_HEADER Header; 2585 UINT32 PlatformInterrupt; 2586 UINT8 Flags; 2587 UINT8 Reserved1; 2588 UINT64 BaseAddress; 2589 UINT32 Length; 2590 ACPI_GENERIC_ADDRESS DoorbellRegister; 2591 UINT64 PreserveMask; 2592 UINT64 WriteMask; 2593 UINT32 Latency; 2594 UINT32 MaxAccessRate; 2595 UINT32 MinTurnaroundTime; 2596 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2597 UINT64 AckPreserveMask; 2598 UINT64 AckSetMask; 2599 UINT64 Reserved2; 2600 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2601 UINT64 CmdCompleteMask; 2602 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2603 UINT64 CmdUpdatePreserveMask; 2604 UINT64 CmdUpdateSetMask; 2605 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2606 UINT64 ErrorStatusMask; 2607 2608 } ACPI_PCCT_EXT_PCC_MASTER; 2609 2610 2611 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2612 2613 typedef struct acpi_pcct_ext_pcc_slave 2614 { 2615 ACPI_SUBTABLE_HEADER Header; 2616 UINT32 PlatformInterrupt; 2617 UINT8 Flags; 2618 UINT8 Reserved1; 2619 UINT64 BaseAddress; 2620 UINT32 Length; 2621 ACPI_GENERIC_ADDRESS DoorbellRegister; 2622 UINT64 PreserveMask; 2623 UINT64 WriteMask; 2624 UINT32 Latency; 2625 UINT32 MaxAccessRate; 2626 UINT32 MinTurnaroundTime; 2627 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2628 UINT64 AckPreserveMask; 2629 UINT64 AckSetMask; 2630 UINT64 Reserved2; 2631 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2632 UINT64 CmdCompleteMask; 2633 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2634 UINT64 CmdUpdatePreserveMask; 2635 UINT64 CmdUpdateSetMask; 2636 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2637 UINT64 ErrorStatusMask; 2638 2639 } ACPI_PCCT_EXT_PCC_SLAVE; 2640 2641 /* 5: HW Registers based Communications Subspace */ 2642 2643 typedef struct acpi_pcct_hw_reg 2644 { 2645 ACPI_SUBTABLE_HEADER Header; 2646 UINT16 Version; 2647 UINT64 BaseAddress; 2648 UINT64 Length; 2649 ACPI_GENERIC_ADDRESS DoorbellRegister; 2650 UINT64 DoorbellPreserve; 2651 UINT64 DoorbellWrite; 2652 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2653 UINT64 CmdCompleteMask; 2654 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2655 UINT64 ErrorStatusMask; 2656 UINT32 NominalLatency; 2657 UINT32 MinTurnaroundTime; 2658 2659 } ACPI_PCCT_HW_REG; 2660 2661 2662 /* Values for doorbell flags above */ 2663 2664 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2665 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2666 2667 2668 /* 2669 * PCC memory structures (not part of the ACPI table) 2670 */ 2671 2672 /* Shared Memory Region */ 2673 2674 typedef struct acpi_pcct_shared_memory 2675 { 2676 UINT32 Signature; 2677 UINT16 Command; 2678 UINT16 Status; 2679 2680 } ACPI_PCCT_SHARED_MEMORY; 2681 2682 2683 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2684 2685 typedef struct acpi_pcct_ext_pcc_shared_memory 2686 { 2687 UINT32 Signature; 2688 UINT32 Flags; 2689 UINT32 Length; 2690 UINT32 Command; 2691 2692 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2693 2694 2695 /******************************************************************************* 2696 * 2697 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2698 * Version 0 2699 * 2700 ******************************************************************************/ 2701 2702 typedef struct acpi_table_pdtt 2703 { 2704 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2705 UINT8 TriggerCount; 2706 UINT8 Reserved[3]; 2707 UINT32 ArrayOffset; 2708 2709 } ACPI_TABLE_PDTT; 2710 2711 2712 /* 2713 * PDTT Communication Channel Identifier Structure. 2714 * The number of these structures is defined by TriggerCount above, 2715 * starting at ArrayOffset. 2716 */ 2717 typedef struct acpi_pdtt_channel 2718 { 2719 UINT8 SubchannelId; 2720 UINT8 Flags; 2721 2722 } ACPI_PDTT_CHANNEL; 2723 2724 /* Flags for above */ 2725 2726 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2727 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2728 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2729 2730 2731 /******************************************************************************* 2732 * 2733 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2734 * Version 1 2735 * 2736 ******************************************************************************/ 2737 2738 typedef struct acpi_table_phat 2739 { 2740 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2741 2742 } ACPI_TABLE_PHAT; 2743 2744 /* Common header for PHAT subtables that follow main table */ 2745 2746 typedef struct acpi_phat_header 2747 { 2748 UINT16 Type; 2749 UINT16 Length; 2750 UINT8 Revision; 2751 2752 } ACPI_PHAT_HEADER; 2753 2754 2755 /* Values for Type field above */ 2756 2757 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2758 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2759 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2760 2761 /* 2762 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2763 */ 2764 2765 /* 0: Firmware Version Data Record */ 2766 2767 typedef struct acpi_phat_version_data 2768 { 2769 ACPI_PHAT_HEADER Header; 2770 UINT8 Reserved[3]; 2771 UINT32 ElementCount; 2772 2773 } ACPI_PHAT_VERSION_DATA; 2774 2775 typedef struct acpi_phat_version_element 2776 { 2777 UINT8 Guid[16]; 2778 UINT64 VersionValue; 2779 UINT32 ProducerId; 2780 2781 } ACPI_PHAT_VERSION_ELEMENT; 2782 2783 2784 /* 1: Firmware Health Data Record */ 2785 2786 typedef struct acpi_phat_health_data 2787 { 2788 ACPI_PHAT_HEADER Header; 2789 UINT8 Reserved[2]; 2790 UINT8 Health; 2791 UINT8 DeviceGuid[16]; 2792 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2793 2794 } ACPI_PHAT_HEALTH_DATA; 2795 2796 /* Values for Health field above */ 2797 2798 #define ACPI_PHAT_ERRORS_FOUND 0 2799 #define ACPI_PHAT_NO_ERRORS 1 2800 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2801 #define ACPI_PHAT_ADVISORY 3 2802 2803 2804 /******************************************************************************* 2805 * 2806 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2807 * Version 1 2808 * 2809 ******************************************************************************/ 2810 2811 typedef struct acpi_table_pmtt 2812 { 2813 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2814 UINT32 MemoryDeviceCount; 2815 /* 2816 * Immediately followed by: 2817 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2818 */ 2819 2820 } ACPI_TABLE_PMTT; 2821 2822 2823 /* Common header for PMTT subtables that follow main table */ 2824 2825 typedef struct acpi_pmtt_header 2826 { 2827 UINT8 Type; 2828 UINT8 Reserved1; 2829 UINT16 Length; 2830 UINT16 Flags; 2831 UINT16 Reserved2; 2832 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2833 /* 2834 * Immediately followed by: 2835 * UINT8 TypeSpecificData[] 2836 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2837 */ 2838 2839 } ACPI_PMTT_HEADER; 2840 2841 /* Values for Type field above */ 2842 2843 #define ACPI_PMTT_TYPE_SOCKET 0 2844 #define ACPI_PMTT_TYPE_CONTROLLER 1 2845 #define ACPI_PMTT_TYPE_DIMM 2 2846 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2847 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2848 2849 /* Values for Flags field above */ 2850 2851 #define ACPI_PMTT_TOP_LEVEL 0x0001 2852 #define ACPI_PMTT_PHYSICAL 0x0002 2853 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2854 2855 2856 /* 2857 * PMTT subtables, correspond to Type in acpi_pmtt_header 2858 */ 2859 2860 2861 /* 0: Socket Structure */ 2862 2863 typedef struct acpi_pmtt_socket 2864 { 2865 ACPI_PMTT_HEADER Header; 2866 UINT16 SocketId; 2867 UINT16 Reserved; 2868 2869 } ACPI_PMTT_SOCKET; 2870 /* 2871 * Immediately followed by: 2872 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2873 */ 2874 2875 2876 /* 1: Memory Controller subtable */ 2877 2878 typedef struct acpi_pmtt_controller 2879 { 2880 ACPI_PMTT_HEADER Header; 2881 UINT16 ControllerId; 2882 UINT16 Reserved; 2883 2884 } ACPI_PMTT_CONTROLLER; 2885 /* 2886 * Immediately followed by: 2887 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2888 */ 2889 2890 2891 /* 2: Physical Component Identifier (DIMM) */ 2892 2893 typedef struct acpi_pmtt_physical_component 2894 { 2895 ACPI_PMTT_HEADER Header; 2896 UINT32 BiosHandle; 2897 2898 } ACPI_PMTT_PHYSICAL_COMPONENT; 2899 2900 2901 /* 0xFF: Vendor Specific Data */ 2902 2903 typedef struct acpi_pmtt_vendor_specific 2904 { 2905 ACPI_PMTT_HEADER Header; 2906 UINT8 TypeUuid[16]; 2907 UINT8 Specific[]; 2908 /* 2909 * Immediately followed by: 2910 * UINT8 VendorSpecificData[]; 2911 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2912 */ 2913 2914 } ACPI_PMTT_VENDOR_SPECIFIC; 2915 2916 2917 /******************************************************************************* 2918 * 2919 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2920 * Version 1 2921 * 2922 ******************************************************************************/ 2923 2924 typedef struct acpi_table_pptt 2925 { 2926 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2927 2928 } ACPI_TABLE_PPTT; 2929 2930 /* Values for Type field above */ 2931 2932 enum AcpiPpttType 2933 { 2934 ACPI_PPTT_TYPE_PROCESSOR = 0, 2935 ACPI_PPTT_TYPE_CACHE = 1, 2936 ACPI_PPTT_TYPE_ID = 2, 2937 ACPI_PPTT_TYPE_RESERVED = 3 2938 }; 2939 2940 2941 /* 0: Processor Hierarchy Node Structure */ 2942 2943 typedef struct acpi_pptt_processor 2944 { 2945 ACPI_SUBTABLE_HEADER Header; 2946 UINT16 Reserved; 2947 UINT32 Flags; 2948 UINT32 Parent; 2949 UINT32 AcpiProcessorId; 2950 UINT32 NumberOfPrivResources; 2951 2952 } ACPI_PPTT_PROCESSOR; 2953 2954 /* Flags */ 2955 2956 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2957 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2958 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2959 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2960 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2961 2962 2963 /* 1: Cache Type Structure */ 2964 2965 typedef struct acpi_pptt_cache 2966 { 2967 ACPI_SUBTABLE_HEADER Header; 2968 UINT16 Reserved; 2969 UINT32 Flags; 2970 UINT32 NextLevelOfCache; 2971 UINT32 Size; 2972 UINT32 NumberOfSets; 2973 UINT8 Associativity; 2974 UINT8 Attributes; 2975 UINT16 LineSize; 2976 2977 } ACPI_PPTT_CACHE; 2978 2979 /* 1: Cache Type Structure for PPTT version 3 */ 2980 2981 typedef struct acpi_pptt_cache_v1 2982 { 2983 UINT32 CacheId; 2984 2985 } ACPI_PPTT_CACHE_V1; 2986 2987 2988 /* Flags */ 2989 2990 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2991 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2992 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2993 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2994 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2995 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2996 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2997 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2998 2999 /* Masks for Attributes */ 3000 3001 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 3002 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 3003 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 3004 3005 /* Attributes describing cache */ 3006 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 3007 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 3008 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 3009 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 3010 3011 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 3012 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 3013 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 3014 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 3015 3016 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 3017 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 3018 3019 /* 2: ID Structure */ 3020 3021 typedef struct acpi_pptt_id 3022 { 3023 ACPI_SUBTABLE_HEADER Header; 3024 UINT16 Reserved; 3025 UINT32 VendorId; 3026 UINT64 Level1Id; 3027 UINT64 Level2Id; 3028 UINT16 MajorRev; 3029 UINT16 MinorRev; 3030 UINT16 SpinRev; 3031 3032 } ACPI_PPTT_ID; 3033 3034 3035 /******************************************************************************* 3036 * 3037 * PRMT - Platform Runtime Mechanism Table 3038 * Version 1 3039 * 3040 ******************************************************************************/ 3041 3042 typedef struct acpi_table_prmt 3043 { 3044 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3045 3046 } ACPI_TABLE_PRMT; 3047 3048 typedef struct acpi_table_prmt_header 3049 { 3050 UINT8 PlatformGuid[16]; 3051 UINT32 ModuleInfoOffset; 3052 UINT32 ModuleInfoCount; 3053 3054 } ACPI_TABLE_PRMT_HEADER; 3055 3056 typedef struct acpi_prmt_module_header 3057 { 3058 UINT16 Revision; 3059 UINT16 Length; 3060 3061 } ACPI_PRMT_MODULE_HEADER; 3062 3063 typedef struct acpi_prmt_module_info 3064 { 3065 UINT16 Revision; 3066 UINT16 Length; 3067 UINT8 ModuleGuid[16]; 3068 UINT16 MajorRev; 3069 UINT16 MinorRev; 3070 UINT16 HandlerInfoCount; 3071 UINT32 HandlerInfoOffset; 3072 UINT64 MmioListPointer; 3073 3074 } ACPI_PRMT_MODULE_INFO; 3075 3076 typedef struct acpi_prmt_handler_info 3077 { 3078 UINT16 Revision; 3079 UINT16 Length; 3080 UINT8 HandlerGuid[16]; 3081 UINT64 HandlerAddress; 3082 UINT64 StaticDataBufferAddress; 3083 UINT64 AcpiParamBufferAddress; 3084 3085 } ACPI_PRMT_HANDLER_INFO; 3086 3087 3088 /******************************************************************************* 3089 * 3090 * RASF - RAS Feature Table (ACPI 5.0) 3091 * Version 1 3092 * 3093 ******************************************************************************/ 3094 3095 typedef struct acpi_table_rasf 3096 { 3097 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3098 UINT8 ChannelId[12]; 3099 3100 } ACPI_TABLE_RASF; 3101 3102 /* RASF Platform Communication Channel Shared Memory Region */ 3103 3104 typedef struct acpi_rasf_shared_memory 3105 { 3106 UINT32 Signature; 3107 UINT16 Command; 3108 UINT16 Status; 3109 UINT16 Version; 3110 UINT8 Capabilities[16]; 3111 UINT8 SetCapabilities[16]; 3112 UINT16 NumParameterBlocks; 3113 UINT32 SetCapabilitiesStatus; 3114 3115 } ACPI_RASF_SHARED_MEMORY; 3116 3117 /* RASF Parameter Block Structure Header */ 3118 3119 typedef struct acpi_rasf_parameter_block 3120 { 3121 UINT16 Type; 3122 UINT16 Version; 3123 UINT16 Length; 3124 3125 } ACPI_RASF_PARAMETER_BLOCK; 3126 3127 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3128 3129 typedef struct acpi_rasf_patrol_scrub_parameter 3130 { 3131 ACPI_RASF_PARAMETER_BLOCK Header; 3132 UINT16 PatrolScrubCommand; 3133 UINT64 RequestedAddressRange[2]; 3134 UINT64 ActualAddressRange[2]; 3135 UINT16 Flags; 3136 UINT8 RequestedSpeed; 3137 3138 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3139 3140 /* Masks for Flags and Speed fields above */ 3141 3142 #define ACPI_RASF_SCRUBBER_RUNNING 1 3143 #define ACPI_RASF_SPEED (7<<1) 3144 #define ACPI_RASF_SPEED_SLOW (0<<1) 3145 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3146 #define ACPI_RASF_SPEED_FAST (7<<1) 3147 3148 /* Channel Commands */ 3149 3150 enum AcpiRasfCommands 3151 { 3152 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3153 }; 3154 3155 /* Platform RAS Capabilities */ 3156 3157 enum AcpiRasfCapabiliities 3158 { 3159 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3160 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3161 }; 3162 3163 /* Patrol Scrub Commands */ 3164 3165 enum AcpiRasfPatrolScrubCommands 3166 { 3167 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3168 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3169 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3170 }; 3171 3172 /* Channel Command flags */ 3173 3174 #define ACPI_RASF_GENERATE_SCI (1<<15) 3175 3176 /* Status values */ 3177 3178 enum AcpiRasfStatus 3179 { 3180 ACPI_RASF_SUCCESS = 0, 3181 ACPI_RASF_NOT_VALID = 1, 3182 ACPI_RASF_NOT_SUPPORTED = 2, 3183 ACPI_RASF_BUSY = 3, 3184 ACPI_RASF_FAILED = 4, 3185 ACPI_RASF_ABORTED = 5, 3186 ACPI_RASF_INVALID_DATA = 6 3187 }; 3188 3189 /* Status flags */ 3190 3191 #define ACPI_RASF_COMMAND_COMPLETE (1) 3192 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3193 #define ACPI_RASF_ERROR (1<<2) 3194 #define ACPI_RASF_STATUS (0x1F<<3) 3195 3196 3197 /******************************************************************************* 3198 * 3199 * RAS2 - RAS2 Feature Table (ACPI 6.5) 3200 * Version 1 3201 * 3202 * 3203 ******************************************************************************/ 3204 3205 typedef struct acpi_table_ras2 { 3206 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3207 UINT16 Reserved; 3208 UINT16 NumPccDescs; 3209 3210 } ACPI_TABLE_RAS2; 3211 3212 /* RAS2 Platform Communication Channel Descriptor */ 3213 3214 typedef struct acpi_ras2_pcc_desc { 3215 UINT8 ChannelId; 3216 UINT16 Reserved; 3217 UINT8 FeatureType; 3218 UINT32 Instance; 3219 3220 } ACPI_RAS2_PCC_DESC; 3221 3222 /* RAS2 Platform Communication Channel Shared Memory Region */ 3223 3224 typedef struct acpi_ras2_shared_memory { 3225 UINT32 Signature; 3226 UINT16 Command; 3227 UINT16 Status; 3228 UINT16 Version; 3229 UINT8 Features[16]; 3230 UINT8 SetCapabilities[16]; 3231 UINT16 NumParameterBlocks; 3232 UINT32 SetCapabilitiesStatus; 3233 3234 } ACPI_RAS2_SHARED_MEMORY; 3235 3236 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3237 3238 typedef struct acpi_ras2_parameter_block 3239 { 3240 UINT16 Type; 3241 UINT16 Version; 3242 UINT16 Length; 3243 3244 } ACPI_RAS2_PARAMETER_BLOCK; 3245 3246 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3247 3248 typedef struct acpi_ras2_patrol_scrub_parameter { 3249 ACPI_RAS2_PARAMETER_BLOCK Header; 3250 UINT16 PatrolScrubCommand; 3251 UINT64 RequestedAddressRange[2]; 3252 UINT64 ActualAddressRange[2]; 3253 UINT32 Flags; 3254 UINT32 ScrubParamsOut; 3255 UINT32 ScrubParamsIn; 3256 3257 } ACPI_RAS2_PATROL_SCRUB_PARAMETER; 3258 3259 /* Masks for Flags field above */ 3260 3261 #define ACPI_RAS2_SCRUBBER_RUNNING 1 3262 3263 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 3264 3265 typedef struct acpi_ras2_la2pa_translation_parameter { 3266 ACPI_RAS2_PARAMETER_BLOCK Header; 3267 UINT16 AddrTranslationCommand; 3268 UINT64 SubInstId; 3269 UINT64 LogicalAddress; 3270 UINT64 PhysicalAddress; 3271 UINT32 Status; 3272 3273 } ACPI_RAS2_LA2PA_TRANSLATION_PARAM; 3274 3275 /* Channel Commands */ 3276 3277 enum AcpiRas2Commands 3278 { 3279 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 3280 }; 3281 3282 /* Platform RAS2 Features */ 3283 3284 enum AcpiRas2Features 3285 { 3286 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 3287 ACPI_RAS2_LA2PA_TRANSLATION = 1 3288 }; 3289 3290 /* RAS2 Patrol Scrub Commands */ 3291 3292 enum AcpiRas2PatrolScrubCommands 3293 { 3294 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 3295 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 3296 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 3297 }; 3298 3299 /* RAS2 LA2PA Translation Commands */ 3300 3301 enum AcpiRas2La2PaTranslationCommands 3302 { 3303 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 3304 }; 3305 3306 /* RAS2 LA2PA Translation Status values */ 3307 3308 enum AcpiRas2La2PaTranslationStatus 3309 { 3310 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 3311 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 3312 }; 3313 3314 /* Channel Command flags */ 3315 3316 #define ACPI_RAS2_GENERATE_SCI (1<<15) 3317 3318 /* Status values */ 3319 3320 enum AcpiRas2Status 3321 { 3322 ACPI_RAS2_SUCCESS = 0, 3323 ACPI_RAS2_NOT_VALID = 1, 3324 ACPI_RAS2_NOT_SUPPORTED = 2, 3325 ACPI_RAS2_BUSY = 3, 3326 ACPI_RAS2_FAILED = 4, 3327 ACPI_RAS2_ABORTED = 5, 3328 ACPI_RAS2_INVALID_DATA = 6 3329 }; 3330 3331 /* Status flags */ 3332 3333 #define ACPI_RAS2_COMMAND_COMPLETE (1) 3334 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 3335 #define ACPI_RAS2_ERROR (1<<2) 3336 #define ACPI_RAS2_STATUS (0x1F<<3) 3337 3338 3339 /******************************************************************************* 3340 * 3341 * RGRT - Regulatory Graphics Resource Table 3342 * Version 1 3343 * 3344 * Conforms to "ACPI RGRT" available at: 3345 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3346 * 3347 ******************************************************************************/ 3348 3349 typedef struct acpi_table_rgrt 3350 { 3351 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3352 UINT16 Version; 3353 UINT8 ImageType; 3354 UINT8 Reserved; 3355 UINT8 Image[]; 3356 3357 } ACPI_TABLE_RGRT; 3358 3359 /* ImageType values */ 3360 3361 enum AcpiRgrtImageType 3362 { 3363 ACPI_RGRT_TYPE_RESERVED0 = 0, 3364 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3365 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3366 }; 3367 3368 3369 /******************************************************************************* 3370 * 3371 * RHCT - RISC-V Hart Capabilities Table 3372 * Version 1 3373 * 3374 ******************************************************************************/ 3375 3376 typedef struct acpi_table_rhct { 3377 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3378 UINT32 Flags; /* RHCT flags */ 3379 UINT64 TimeBaseFreq; 3380 UINT32 NodeCount; 3381 UINT32 NodeOffset; 3382 } ACPI_TABLE_RHCT; 3383 3384 /* RHCT Flags */ 3385 3386 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 3387 /* 3388 * RHCT subtables 3389 */ 3390 typedef struct acpi_rhct_node_header { 3391 UINT16 Type; 3392 UINT16 Length; 3393 UINT16 Revision; 3394 } ACPI_RHCT_NODE_HEADER; 3395 3396 /* Values for RHCT subtable Type above */ 3397 3398 enum acpi_rhct_node_type { 3399 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3400 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 3401 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 3402 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 3403 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3404 }; 3405 3406 /* 3407 * RHCT node specific subtables 3408 */ 3409 3410 /* ISA string node structure */ 3411 typedef struct acpi_rhct_isa_string { 3412 UINT16 IsaLength; 3413 char Isa[]; 3414 } ACPI_RHCT_ISA_STRING; 3415 3416 typedef struct acpi_rhct_cmo_node { 3417 UINT8 Reserved; /* Must be zero */ 3418 UINT8 CbomSize; /* CBOM size in powerof 2 */ 3419 UINT8 CbopSize; /* CBOP size in powerof 2 */ 3420 UINT8 CbozSize; /* CBOZ size in powerof 2 */ 3421 } ACPI_RHCT_CMO_NODE; 3422 3423 typedef struct acpi_rhct_mmu_node { 3424 UINT8 Reserved; /* Must be zero */ 3425 UINT8 MmuType; /* Virtual Address Scheme */ 3426 } ACPI_RHCT_MMU_NODE; 3427 3428 enum acpi_rhct_mmu_type { 3429 ACPI_RHCT_MMU_TYPE_SV39 = 0, 3430 ACPI_RHCT_MMU_TYPE_SV48 = 1, 3431 ACPI_RHCT_MMU_TYPE_SV57 = 2 3432 }; 3433 3434 /* Hart Info node structure */ 3435 typedef struct acpi_rhct_hart_info { 3436 UINT16 NumOffsets; 3437 UINT32 Uid; /* ACPI processor UID */ 3438 } ACPI_RHCT_HART_INFO; 3439 3440 /******************************************************************************* 3441 * 3442 * SBST - Smart Battery Specification Table 3443 * Version 1 3444 * 3445 ******************************************************************************/ 3446 3447 typedef struct acpi_table_sbst 3448 { 3449 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3450 UINT32 WarningLevel; 3451 UINT32 LowLevel; 3452 UINT32 CriticalLevel; 3453 3454 } ACPI_TABLE_SBST; 3455 3456 3457 /******************************************************************************* 3458 * 3459 * SDEI - Software Delegated Exception Interface Descriptor Table 3460 * 3461 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3462 * May 8th, 2017. Copyright 2017 ARM Ltd. 3463 * 3464 ******************************************************************************/ 3465 3466 typedef struct acpi_table_sdei 3467 { 3468 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3469 3470 } ACPI_TABLE_SDEI; 3471 3472 3473 /******************************************************************************* 3474 * 3475 * SDEV - Secure Devices Table (ACPI 6.2) 3476 * Version 1 3477 * 3478 ******************************************************************************/ 3479 3480 typedef struct acpi_table_sdev 3481 { 3482 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3483 3484 } ACPI_TABLE_SDEV; 3485 3486 3487 typedef struct acpi_sdev_header 3488 { 3489 UINT8 Type; 3490 UINT8 Flags; 3491 UINT16 Length; 3492 3493 } ACPI_SDEV_HEADER; 3494 3495 3496 /* Values for subtable type above */ 3497 3498 enum AcpiSdevType 3499 { 3500 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3501 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3502 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3503 }; 3504 3505 /* Values for flags above */ 3506 3507 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3508 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3509 3510 /* 3511 * SDEV subtables 3512 */ 3513 3514 /* 0: Namespace Device Based Secure Device Structure */ 3515 3516 typedef struct acpi_sdev_namespace 3517 { 3518 ACPI_SDEV_HEADER Header; 3519 UINT16 DeviceIdOffset; 3520 UINT16 DeviceIdLength; 3521 UINT16 VendorDataOffset; 3522 UINT16 VendorDataLength; 3523 3524 } ACPI_SDEV_NAMESPACE; 3525 3526 typedef struct acpi_sdev_secure_component 3527 { 3528 UINT16 SecureComponentOffset; 3529 UINT16 SecureComponentLength; 3530 3531 } ACPI_SDEV_SECURE_COMPONENT; 3532 3533 3534 /* 3535 * SDEV sub-subtables ("Components") for above 3536 */ 3537 typedef struct acpi_sdev_component 3538 { 3539 ACPI_SDEV_HEADER Header; 3540 3541 } ACPI_SDEV_COMPONENT; 3542 3543 3544 /* Values for sub-subtable type above */ 3545 3546 enum AcpiSacType 3547 { 3548 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3549 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3550 }; 3551 3552 typedef struct acpi_sdev_id_component 3553 { 3554 ACPI_SDEV_HEADER Header; 3555 UINT16 HardwareIdOffset; 3556 UINT16 HardwareIdLength; 3557 UINT16 SubsystemIdOffset; 3558 UINT16 SubsystemIdLength; 3559 UINT16 HardwareRevision; 3560 UINT8 HardwareRevPresent; 3561 UINT8 ClassCodePresent; 3562 UINT8 PciBaseClass; 3563 UINT8 PciSubClass; 3564 UINT8 PciProgrammingXface; 3565 3566 } ACPI_SDEV_ID_COMPONENT; 3567 3568 typedef struct acpi_sdev_mem_component 3569 { 3570 ACPI_SDEV_HEADER Header; 3571 UINT32 Reserved; 3572 UINT64 MemoryBaseAddress; 3573 UINT64 MemoryLength; 3574 3575 } ACPI_SDEV_MEM_COMPONENT; 3576 3577 3578 /* 1: PCIe Endpoint Device Based Device Structure */ 3579 3580 typedef struct acpi_sdev_pcie 3581 { 3582 ACPI_SDEV_HEADER Header; 3583 UINT16 Segment; 3584 UINT16 StartBus; 3585 UINT16 PathOffset; 3586 UINT16 PathLength; 3587 UINT16 VendorDataOffset; 3588 UINT16 VendorDataLength; 3589 3590 } ACPI_SDEV_PCIE; 3591 3592 /* 1a: PCIe Endpoint path entry */ 3593 3594 typedef struct acpi_sdev_pcie_path 3595 { 3596 UINT8 Device; 3597 UINT8 Function; 3598 3599 } ACPI_SDEV_PCIE_PATH; 3600 3601 3602 /******************************************************************************* 3603 * 3604 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3605 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3606 * Trust Domain Extensions (Intel TDX)". 3607 * Version 1 3608 * 3609 ******************************************************************************/ 3610 3611 typedef struct acpi_table_svkl 3612 { 3613 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3614 UINT32 Count; 3615 3616 } ACPI_TABLE_SVKL; 3617 3618 typedef struct acpi_svkl_key 3619 { 3620 UINT16 Type; 3621 UINT16 Format; 3622 UINT32 Size; 3623 UINT64 Address; 3624 3625 } ACPI_SVKL_KEY; 3626 3627 enum acpi_svkl_type 3628 { 3629 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3630 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3631 }; 3632 3633 enum acpi_svkl_format 3634 { 3635 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3636 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3637 }; 3638 3639 3640 /******************************************************************************* 3641 * 3642 * TDEL - TD-Event Log 3643 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3644 * Trust Domain Extensions (Intel TDX)". 3645 * September 2020 3646 * 3647 ******************************************************************************/ 3648 3649 typedef struct acpi_table_tdel 3650 { 3651 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3652 UINT32 Reserved; 3653 UINT64 LogAreaMinimumLength; 3654 UINT64 LogAreaStartAddress; 3655 3656 } ACPI_TABLE_TDEL; 3657 3658 /* Reset to default packing */ 3659 3660 #pragma pack() 3661 3662 #endif /* __ACTBL2_H__ */ 3663