bus_managers/pci/pci.h

24 struct PCIDev;
27 	PCIDev *			parent;
28 	PCIDev *			child;
33 struct PCIDev {  struct
34 	PCIDev *			next;  argument
97 			uint32			ReadConfig(PCIDev *device, uint16 offset,
103 			status_t		WriteConfig(PCIDev *device, uint16 offset,
109 			status_t		FindCapability(PCIDev *device, uint8 capID,
114 			status_t		FindExtendedCapability(PCIDev *device,
119 			status_t		FindHTCapability(PCIDev *device,
125 			PCIDev *		FindDevice(uint8 domain, uint8 bus, uint8 device,
130 			uint8			GetPowerstate(PCIDev *device);
133 			void			SetPowerstate(PCIDev *device, uint8 state);
143 			uint32			GetMSICount(PCIDev *device);
144 			status_t		ConfigureMSI(PCIDev *device, uint32 count, uint32 *startVector);
145 			status_t		UnconfigureMSI(PCIDev *device);
146 			status_t		EnableMSI(PCIDev *device);
147 			status_t		DisableMSI(PCIDev *device);
148 			uint32			GetMSIXCount(PCIDev *device);
149 			status_t		ConfigureMSIX(PCIDev *device, uint32 count, uint32 *startVector);
150 			status_t		EnableMSIX(PCIDev *device);
162 			PCIDev *		_CreateDevice(PCIBus *parent, uint8 dev,
164 			PCIBus *		_CreateBus(PCIDev *parent, uint8 domain,
169 			void			_ReadBasicInfo(PCIDev *dev);
170 			void			_ReadHeaderInfo(PCIDev *dev);
176 			size_t			_GetBarInfo(PCIDev *dev, uint8 offset,
182 			void			_GetRomBarInfo(PCIDev *dev, uint8 offset,
195 			PCIDev *		_FindDevice(PCIBus *current, uint8 domain,
198 			void			_HtMSIMap(PCIDev *device, uint64 address);
199 			void			_ReadMSIInfo(PCIDev *device);
200 			void			_ReadMSIXInfo(PCIDev *device);
201 			void			_ReadHtMappingInfo(PCIDev *device);
202 			status_t		_UnconfigureMSIX(PCIDev *device);
203 			status_t		_DisableMSIX(PCIDev *device);