Lines Matching refs:m_max
492 int m = 0, n = 0, p = 0, m_max, p_max; in nv_dac_sys_pll_find() local
507 m_max = 14; in nv_dac_sys_pll_find()
520 if (req_sclk > 340.0) m_max = 2; /* Fpll > 340Mhz */ in nv_dac_sys_pll_find()
521 else if (req_sclk > 200.0) m_max = 4; /* 200Mhz < Fpll <= 340Mhz */ in nv_dac_sys_pll_find()
522 else if (req_sclk > 150.0) m_max = 6; /* 150Mhz < Fpll <= 200Mhz */ in nv_dac_sys_pll_find()
523 else m_max = 14; /* Fpll < 150Mhz */ in nv_dac_sys_pll_find()
536 if (req_sclk > 340.0) m_max = 2; /* Fpll > 340Mhz */ in nv_dac_sys_pll_find()
537 else if (req_sclk > 250.0) m_max = 6; /* 250Mhz < Fpll <= 340Mhz */ in nv_dac_sys_pll_find()
538 else m_max = 14; /* Fpll < 250Mhz */ in nv_dac_sys_pll_find()
552 LOG(4, ("DAC: PLL reference frequency postscaler divider range is 1 - %d\n", m_max)); in nv_dac_sys_pll_find()
586 for (m = 1; m <= m_max; m++) in nv_dac_sys_pll_find()