Lines Matching refs:__bits
100 } __bits; member
111 __r.__bits.__reg &= ~__excepts; in feclearexcept()
122 *__flagp = __r.__bits.__reg & __excepts; in fegetexceptflag()
134 __r.__bits.__reg &= ~__excepts; in fesetexceptflag()
135 __r.__bits.__reg |= *__flagp & __excepts; in fesetexceptflag()
148 __r.__bits.__reg |= __excepts; in feraiseexcept()
159 return (__r.__bits.__reg & __excepts); in fetestexcept()
168 return (__r.__bits.__reg & _ROUND_MASK); in fegetround()
179 __r.__bits.__reg &= ~_ROUND_MASK; in fesetround()
180 __r.__bits.__reg |= __round; in fesetround()
191 *__envp = __r.__bits.__reg; in fegetenv()
202 __r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); in feholdexcept()
212 __r.__bits.__reg = *__envp; in fesetenv()
223 __r.__bits.__reg &= FE_ALL_EXCEPT; in feupdateenv()
224 __r.__bits.__reg |= *__envp; in feupdateenv()
238 __oldmask = __r.__bits.__reg; in feenableexcept()
239 __r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT; in feenableexcept()
251 __oldmask = __r.__bits.__reg; in fedisableexcept()
252 __r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT); in fedisableexcept()
263 return ((__r.__bits.__reg & _ENABLE_MASK) << _FPUSW_SHIFT); in fegetexcept()